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Panoramic SETI: Overall focal plane electronics and timing and network protocols

Wei Liu, Dan Werthimer, Ryan Lee, Franklin Antonio, Michael Aronson, Aaron Brown, Frank Drake, Andrew Howard, Paul Horowitz, Jerome Maire, Rick Raffanti, Remington Stone (+2 others)
2021 arXiv   pre-print
Precise timing is implemented in the gateware with the White Rabbit protocol.  ...  Here we describe the focal-plane electronics for the visible wavelength telescopes, each of which contains a Mother Board and four Quadrant Boards.  ...  We thank the Bloomfield Family Foundation for supporting SETI research at UC San Diego in the CASS Optical and Infrared Laboratory.  ... 
arXiv:2111.11476v1 fatcat:5ai6vrsvmbguhk5zqzi7j7mvku

Survey on some optimization possibilities for data plane applications [article]

Gereltsetseg Altangerel, Tejfel Máté
2021 arXiv   pre-print
Therefore, the programmable data planes and SDNs offer great flexibility in network customization, allowing many innovations to be introduced on the network.  ...  The general focus of research on the data plane is data-plane abstractions, languages and compilers, data plane algorithms, and applications.  ...  Excellence Programme TKP2020-NKA-06 (National Challenges Sub programme) funding scheme.  ... 
arXiv:2201.11516v1 fatcat:m5h2h4zgwvg3fiwphatqol5eaq

RedPlane

Daehyeok Kim, Jacob Nelson, Dan R. K. Ports, Vyas Sekar, Srinivasan Seshan
2021 Proceedings of the 2021 ACM SIGCOMM 2021 Conference  
We address key challenges in devising a practical, provably correct replication protocol and implementing it in the switch data plane.  ...  Many recent efforts have demonstrated the performance benefits of running datacenter functions (e.g., NATs, load balancers, monitoring) on programmable switches.  ...  This work was supported in part by the CONIX Research Center, one of six centers in JUMP, a Semiconductor Research Corporation (SRC) program sponsored by DARPA, and by NSF award 1700521.  ... 
doi:10.1145/3452296.3472905 fatcat:ckke2hzzf5d5tjmetni73hmxja

The Programmable Data Plane

Oliver Michel, Roberto Bifulco, Gábor Rétvári, Stefan Schmid
2021 ACM Computing Surveys  
Programmable data plane technologies enable the systematic reconfiguration of the low-level processing steps applied to network packets and are key drivers toward realizing the next generation of network  ...  This survey presents recent trends and issues in the design and implementation of programmable network devices, focusing on prominent abstractions, architectures, algorithms, and applications proposed,  ...  Acknowledgments The research leading to these results has received funding from the European Union's H2020 Framework Programme (H2020-EU.2.1.1) under grant agreement n. 101017171 (Project "Marsal") and  ... 
doi:10.1145/3447868 fatcat:hafeovivhfgmpecqzrinsbfmnq

Development of a SiPM Camera for a Schwarzschild-Couder Cherenkov Telescope for the Cherenkov Telescope Array [article]

A. N. Otte, J. Biteau, H. Dickinson, S. Funk, T. Jogler, C. A. Johnson, P. Karn, K. Meagher, H. Naoya, T. Nguyen, A. Okumura, M. Santander, L. Sapozhnikov (+7 others)
2015 arXiv   pre-print
The finely pixelated camera samples air-shower images with more than twice the optical resolution of cameras that are used in current Cherenkov telescopes.  ...  For the prototype camera development, SiPMs from Hamamatsu with through silicon via (TSV) technology are used.  ...  in the camera with nanosecond precision.  ... 
arXiv:1509.02345v1 fatcat:pzor24nkdnab7popa23kmsl5zm

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

Elie F. Kfoury, Jorge Crichigno, Elias Bou-Harb
2021 IEEE Access  
Despite the impressive advantages of programmable data plane switches and their importance in modern networks, the literature has been missing a comprehensive survey.  ...  Traditionally, the data plane has been designed with fixed functions to forward packets using a small set of protocols.  ...  ACKNOWLEDGEMENT This material is based upon work supported by the National Science Foundation under grant numbers 1925484 and 1829698, funded by the Office of Advanced Cyberinfrastructure (OAC).  ... 
doi:10.1109/access.2021.3086704 fatcat:2jgbxj2cbfbp7fawkxwrztbbia

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends [article]

Elie F. Kfoury, Jorge Crichigno, Elias Bou-Harb
2021 arXiv   pre-print
Despite the impressive advantages of programmable data plane switches and their importance in modern networks, the literature has been missing a comprehensive survey.  ...  Traditionally, the data plane has been designed with fixed functions to forward packets using a small set of protocols.  ...  [83] proposed BurstRadar, a system that uses programmable switches to monitor microbursts in the data plane.  ... 
arXiv:2102.00643v2 fatcat:izxi645kozdc5ibfsqp2y2foau

KM3NeT front-end and readout electronics system: hardware, firmware and software [article]

The KM3NeT Collaboration: S. Aiello, F. Ameli, M. Andre, G. Androulakis, M. Anghinolfi, G. Anton, M. Ardid, J. Aublin, C. Bagatelas, G. Barbarino, B. Baret, S. Basegmez du Pree (+220 others)
2019 arXiv   pre-print
This paper presents an overview of the front-end and readout electronics system inside the optical module, which has been designed for a 1~ns synchronization between the clocks of all optical modules in  ...  the grid during a life time of at least 20 years.  ...  Acknowledgments The authors acknowledge the financial support of the funding agencies: Agence Nationale de la Recherche (contract ANR-15-CE31-0020), Centre National de la Recherche Scientifique (CNRS),  ... 
arXiv:1907.06453v2 fatcat:svjwisg3ibdobdouiczxwb6yz4

Development and validation of a 64 channel front end ASIC for 3D directional detection for MIMAC

J P Richer, O Bourrion, G Bosson, O Guillaudin, F Mayet, D Santos
2011 Journal of Instrumentation  
Each ASIC is able to monitor 64 strips of pixels and provides the "Time Over Threshold" information for each of those.  ...  A front end ASIC has been designed to equip the μTPC prototype developed for the MIMAC project, which requires 3D reconstruction of low energy particle tracks in order to perform directional detection  ...  To be able to recover the third coordinate (Z) of the track, a fast switching current comparator having a threshold as low as 200 nA must be designed in order to have a precise time over threshold measurement  ... 
doi:10.1088/1748-0221/6/11/c11016 fatcat:26pvwqtu25d2dka4ljs5rolcve

Performance of fully instrumented detector planes of the forward calorimeter of a Linear Collider detector

H. Abramowicz, A. Abusleme, K. Afanaciev, J. Aguilar, E. Alvarez, D. Avila, Y. Benhammou, L. Bortko, O. Borysov, M. Bergholz, I. Bozovic-Jelisavcic, E. Castro (+56 others)
2015 Journal of Instrumentation  
The detector plane comprises silicon or GaAs pad sensors, dedicated front-end and ADC ASICs, and an FPGA for data concentration.  ...  Detector-plane prototypes of the very forward calorimetry of a future detector at an e + e − collider have been built and their performance was measured in an electron beam.  ...  The main blocks of the signal-processing chain are sensor, FE-electronics ASIC, ADC-ASIC and Field Programmable Gate Array (FPGA) based data concentrator.  ... 
doi:10.1088/1748-0221/10/05/p05009 fatcat:wbf5nqlffjgqbliygkcq4sr3ba

A Survey on Data Plane Programming with P4: Fundamentals, Advances, and Applied Research [article]

Frederik Hauser, Marco Häberle, Daniel Merling, Steffen Lindner, Vladimir Gurevich, Florian Zeiger, Reinhard Frank, Michael Menth
2021 arXiv   pre-print
In the first part of this paper we give a tutorial of data plane programming models, the P4 programming language, architectures, compilers, targets, and data plane APIs.  ...  Programmable data planes allow users to define their own data plane algorithms for network devices including appropriate data plane application programming interfaces (APIs) which may be leveraged by user-defined  ...  Switch-centric BFT (SC-BFT) [494] proposes to offload BFT functionalities, i.e., time synchronization and state synchronization, into the data plane.  ... 
arXiv:2101.10632v3 fatcat:ci4hkca5ibdzpatgowhzqcqzvm

Performance of fully instrumented detector planes of the forward calorimeter of a Linear Collider detector [article]

The FCAL Collaboration: H. Abramowicz, A. Abusleme, K. Afanaciev, J. Aguilar, E. Alvarez, D. Avila, Y. Benhammou, L. Bortko, O. Borysov, M. Bergholz, I. Bozovic-Jelisavcic, E. Castro (+50 others)
2015 arXiv   pre-print
The detector plane comprises silicon or GaAs pad sensors, dedicated front-end and ADC ASICs, and an FPGA for data concentration.  ...  Detector-plane prototypes of the very forward calorimetry of a future detector at an e+e- collider have been built and their performance was measured in an electron beam.  ...  The main blocks of the signal-processing chain are sensor, FE ASIC, ADC ASIC and a Field Programmable Gate Array (FPGA) based data concentrator.  ... 
arXiv:1411.4431v2 fatcat:us4tkcvfnva2td5lk6ryon2uke

KM3NeT front-end and readout electronics system: hardware, firmware, and software

Sebastiano Aiello, Annarita Margiotta, Antonio Marinelli, Christos Markou, Gregory Martignac, Lilian Martin, Juan A. Martínez-Mora, Agnese Martini, Fabio Marzaioli, Safaa Mazzou, Rosa Mele, Karel W. Melis (+326 others)
2019 Journal of Astronomical Telescopes Instruments and Systems  
We present an overview of the front-end and readout electronics system inside the optical module, which has been designed for a 1-ns synchronization between the clocks of all optical modules in the grid  ...  during a life time of at least 20 years.  ...  Acknowledgments The authors acknowledge financial support from the funding agencies: Agence Nationale de la Recherche (Grant No. ANR-15-CE31-0020), Centre National de la Recherche Scientifique  ... 
doi:10.1117/1.jatis.5.4.046001 fatcat:f4hap2a3mbf2bgdh4wvqci7fru

Design and performance of the prototype Schwarzschild-Couder telescope camera

Colin B. Adams, Giovanni Ambrosi, Michelangelo Ambrosio, Carla Aramo, Timothy Arlen, Wystan Benbow, Bruna Bertucci, Elisabetta Bissaldi, Jonathan Biteau, Massimiliano Bitossi, Alfonso Boiano, Carmela Bonavolontà (+77 others)
2022 Journal of Astronomical Telescopes Instruments and Systems  
An upgrade of the pSCT camera is in progress, which will fully populate the focal plane. This will increase the number of pixels to 11,328, the number of backplanes to 9, and the FoV to 8.04^∘.  ...  The pSCT is based on a novel dual mirror optics design which reduces the plate scale and allows for the use of silicon photomultipliers as photodetectors.  ...  We also thank the VERITAS Collaboration for their cooperation in joint observations and for the use of their data. This paper has gone through internal review by the CTA Consortium.  ... 
doi:10.1117/1.jatis.8.1.014007 fatcat:cie2xxrzw5fp3cftv2pem6afty

Software-Defined Networking: State of the Art and Research Challenges [article]

Manar Jammal, Taranpreet Singh, Abdallah Shami, Rasool Asal, and Yiming Li
2014 arXiv   pre-print
In this paper, our aim is to describe the benefits of using SDN in a multitude of environments such as in data centers, data center networks, and Network as Service offerings.  ...  Real-time performance and high availability requirements have induced telecom networks to adopt the new concepts of the cloud model: software-defined networking (SDN) and network function virtualization  ...  Controlling the Data Path between the ASIC and the CPU Although the control data path in a line-card ASIC is fast, the data path between the ASIC and the CPU is not used in the frequent operations of the  ... 
arXiv:1406.0124v1 fatcat:dq5kyzypbrapfcncul7eiuyjnm
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