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Polyhedral Optimizations for a Data-Flow Graph Language
[chapter]
2016
Lecture Notes in Computer Science
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This paper proposes a novel optimization framework for the Data-Flow Graph Language (DFGL), a dependence-based notation for macro-dataflow model which can be used as an embedded domain-specific language ...
checks, while taking full advantage of the optimization functionality in state-of-the-art polyhedral frameworks. ...
DFGL model The Data-Flow Graph Language (DFGL) model is a dependence based notation for dataflow parallelism, which is based on the Concurrent Collections (CnC) model [21, 12] and the Data Flow Graph ...
doi:10.1007/978-3-319-29778-1_4
fatcat:27nc3hshezejvewqkegwi2q26y
Loop Optimization (Dagstuhl Seminar 18111)
2018
Dagstuhl Reports
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The seminar brought together experts from three areas: (1) model-based loop optimization, chiefly, in the polyhedron model, (2) rewriting and program transformation, and (3) metaprogramming and symbolic ...
This report documents the programme of Dagstuhl Seminar 18111 "Loop Optimization". ...
., for specific parallelization or data locality patterns. ...
doi:10.4230/dagrep.8.3.39
dblp:journals/dagstuhl-reports/HackKL18
fatcat:ms75ouezgreirnhsr7dk2i7bo4
Using polyhedral techniques to tighten WCET estimates of optimized code: A case study with array contraction
2018
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)
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Polyhedral based SPM management Polyhedral based loop and data-layout transformation techniques are very efficient when it comes to optimizing memory accesses for SPM-based platforms [5] . ...
This input specification is then parallelized and optimized for WCET on an embedded multi-core architecture. ...
doi:10.23919/date.2018.8342142
dblp:conf/date/LefeuvreFCGKPD18
fatcat:67zoygqfanfqtjdmui6cuzavfe
An Interactive Visual Tool for Code Optimization and Parallelization Based on the Polyhedral Model
2016
2016 45th International Conference on Parallel Processing Workshops (ICPPW)
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These techniques can simultaneously optimize for a number of performance parameters (i.e. parallelism, locality, etc). ...
In this paper we present PUMA-V, a visualization interface that helps the user understand and affect the transformations made by R-Stream, an industrial strength optimizing compiler based on the polyhedral ...
Optimizing compilers based on the polyhedral model [4] [18] take as input a traditional C style loop nest and output transformed code that is optimized for a number of performance characteristics (e.g ...
doi:10.1109/icppw.2016.52
dblp:conf/icppw/PapenhausenMLML16
fatcat:i7jsbsv3ezer5k5jerluf54ebm
CMOST
2015
Proceedings of the 52nd Annual Design Automation Conference on - DAC '15
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We also present several novel techniques on integrating optimizations in CMOST, including task-level dependence analysis, block-based data streaming, and automated SDF generation. ...
CMOST establishes a unified framework for the integration of various system-level optimizations and for different hardware platforms. ...
ACKNOWLEDGEMENTS The authors would like to thank Young-Kyu Choi, Hassan Kianinejad, Jie Lei, Peng Li, Jie Wang, and Yuxin Wang for the efforts in CMOST development and design case study. ...
doi:10.1145/2744769.2744807
dblp:conf/dac/ZhangHXHC15
fatcat:b2i7ojxmmjdwffcazibpuxvhym
Embedded and Real-time Systems
[chapter]
2019
Real-Time Embedded Multithreading Using ThreadX
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ReactiveML is based on the synchronous reactive model due to Boussinot, embedded in an ML language (OCaml). ...
We would like to deepen the exploration of this link, embedding polyhedral techniques into the compilation flow of data-flow, relaxed synchronous languages. ...
doi:10.1201/9780429187575-1
fatcat:ngrbtza47bhrdmlrbn2xdhg5de
Predictive modeling in a polyhedral optimization space
2011
International Symposium on Code Generation and Optimization (CGO 2011)
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Polyhedral models for compiler optimization have demonstrated their strong potential in increasing the program performance, in particular for compute-intensive applications. ...
We introduce models that take as input a characterization of a program based on its dynamic behavior, and predict the performance of aggressive high-level polyhedral transformations that includes tiling ...
data locality and memory footprint. ...
doi:10.1109/cgo.2011.5764680
dblp:conf/cgo/ParkPCCS11
fatcat:4jf4y3zuwza37bpdp6je5yyrkm
Predictive Modeling in a Polyhedral Optimization Space
2013
International journal of parallel programming
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Polyhedral models for compiler optimization have demonstrated their strong potential in increasing the program performance, in particular for compute-intensive applications. ...
We introduce models that take as input a characterization of a program based on its dynamic behavior, and predict the performance of aggressive high-level polyhedral transformations that includes tiling ...
data locality and memory footprint. ...
doi:10.1007/s10766-013-0241-1
fatcat:x3slz5gqlfdzzhu3jnlyfetjhy
Oil and Water Can Mix: An Integration of Polyhedral and AST-Based Transformations
2014
SC14: International Conference for High Performance Computing, Networking, Storage and Analysis
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In this paper, we propose a novel optimization flow that combines polyhedral and syntactic/AST-based transformations. ...
Optimizing compilers targeting modern multi-core machines require complex program restructuring to expose the best combinations of coarse-and fine-grain parallelism and data locality. ...
ACKNOWLEDGMENT This work for was supported in part by the Center for Domain Specific Computing (NSF Expeditions in Computing Award CCF-0926127). ...
doi:10.1109/sc.2014.29
dblp:conf/sc/ShirakoPS14
fatcat:lgdqaqc2ibcknnefuum5sfttq4
Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections
2012
Journal of Electrical and Computer Engineering
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for data processing applications. ...
Polyhedral models are embedded in TLDM for concise expression of task instances, array accesses, and dependencies. ...
We would like to thank Vivek Sarkar for helpful discussions, and Janice Wheeler for editing this paper. ...
doi:10.1155/2012/691864
fatcat:p25oxad2e5e3neqpzegft77qhe
Data-aware process networks
2021
Proceedings of the 30th ACM SIGPLAN International Conference on Compiler Construction
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In this paper, we present the data-aware process networks (DPN), a dataflow intermediate representation suitable for HLS in the context of high-performance computing. ...
CCS Concepts: • Hardware → High-level and registertransfer level synthesis; • Theory of computation → Streaming models. ...
For a large system with large domains such optimizations are mandatory, as an embedded low/no control flow kernel will stall most of the time waiting for the data from the DDR. ...
doi:10.1145/3446804.3446847
fatcat:pyhil53nuzg2hk2dc7pbj7zh6q
Polyhedral Dataflow Programming: A Case Study
2018
2018 30th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)
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However, when generating code for parallel processors, current dataflow compilers only take into consideration the overall dataflow network of the application. ...
In this work, we study the benefits of jointly using polyhedral compilation with dataflow languages. ...
ACKNOWLEDGMENT We are grateful to people at Kalray for allowing us to experiment with their ΣC compiler. ...
doi:10.1109/cahpc.2018.8645947
dblp:conf/sbac-pad/FontaineGM18
fatcat:iinv4zjxznbhblp2tfblt47kr4
Parallel Processing of Sequential Media Algorithms on Heterogeneous Multi-Processor System-on-Chip
2009
Journal of Computers
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Data locality and communication cost are optimized during the parallel processing. ...
Therefore, utilizing parallelization opportunity of MPSoC for improving performance and efficiency of media applications has been one of the hottest researches in the field of embedded system. ...
In the parallel processing of sequential media algorithms, mapping candidates are generated on the basis of polyhedral-model-based data dependency analysis. ...
doi:10.4304/jcp.4.6.477-484
fatcat:bljxfxehrbfl3lfkv3p2rcm6yu
Integrated software tools for the memory management of low-energy embedded signal processing systems
2012
2012 5th International Congress on Image and Signal Processing
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This paper presents an energy-aware CAD methodology for the system-level exploration of hierarchical storage organizations, focusing mainly on data-intensive signal processing applications. ...
The last phase of the methodology is a novel approach for powerefficient banking of the on-chip memory. keywords-Memory management, memory allocation, embedded signal processing systems, signal-to-memory ...
CONCLUSIONS This paper has presented an integrated computer-aided design methodology for power-aware hierarchical memory allocation, targeting embedded data-intensive signal processing applications. ...
doi:10.1109/cisp.2012.6469819
fatcat:mdsdpatifre3vf53ulwfu4usuu
Reduction Drawing
2016
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation - PACT '16
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, and optimizing data transfers and storage in the presence of reductions. ...
We also extend a polyhedral compilation flow to process these user-defined reductions, enabling optimizations such as the fusion of multiple reductions, combining reductions with other loop transformations ...
Our experiments with SLAMBench k-fusion benefited from numerous exchanges with Bruno Bodin, Luigi Nardi and Ali Zaidi, with whom we are also working on a PENCIL release of the application. ...
doi:10.1145/2967938.2967950
dblp:conf/IEEEpact/ReddyK016
fatcat:wa2vo7mhu5c4no6wlq7oh4tvba
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