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Polychronous Methodology For System Design: A True Concurrency Approach

Syed Suhaib, Deepak Mathaikutty, Sandeep Shukla, Jean-pierre Talpin
<span title="">2006</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/hbvn6m6kincupdvulvumabespu" style="color: black;">High Level Design Validation and Test Workshop (HLDVT), IEEE International</a> </i> &nbsp;
In this paper, we propose a 'true concurrency' semantic model of polychrony using pomsets.  ...  As embedded systems have become pervasive and ubiquitous in contemporary technologies, their development requires highly reliable design approaches.  ...  In order to simplify the notion of polychronous specification we model a "true concurrency" representation of polychrony.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/hldvt.2006.319993">doi:10.1109/hldvt.2006.319993</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/hldvt/SuhaibMST06.html">dblp:conf/hldvt/SuhaibMST06</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/6nk3yndowvf23gcjddrf3pbju4">fatcat:6nk3yndowvf23gcjddrf3pbju4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20100619073040/http://www.fermat.ece.vt.edu/old_site/Fermatian_Info/damathai/pubs/HLDVT06.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/eb/45/eb456d49f6fc7b82bf1f98db762f34edc93e278d.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/hldvt.2006.319993"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Compositional design of isochronous systems

Jean-Pierre Talpin, Julien Ouy, Loic Besnard, Paul Le Guernic
<span title="">2008</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/qjrrvry5ubgdlarkymvlxuip6m" style="color: black;">2008 Design, Automation and Test in Europe</a> </i> &nbsp;
Our aim is to balance it by proposing a formal design methodology that adheres to a weakened global design objective: the non-blocking composition of weakly endochronous processes, while preserving local  ...  The synchronous modeling paradigm provides strong execution correctness guarantees to embedded system design while making minimal environmental assumptions.  ...  A compositional design methodology Our static criterion for checking the composition of endochronous processes isochronous defines a cost-effective methodology for the integration of components in the  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/date.2008.4484793">doi:10.1109/date.2008.4484793</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/date/TalpinOBG08.html">dblp:conf/date/TalpinOBG08</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/y2uou4hk6bfvjf6itwtvcmdjjq">fatcat:y2uou4hk6bfvjf6itwtvcmdjjq</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170705105820/https://www.date-conference.com/proceedings-archive/PAPERS/2008/DATE08/PDFFILES/07.6_4.PDF" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/ec/54/ec54729378dd995ddac55a3788a3f063fe6d8207.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/date.2008.4484793"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Compositional design of isochronous systems

Jean-Pierre Talpin, Julien Ouy, Loïc Besnard, Paul Le Guernic
<span title="">2008</span> <i title="ACM Press"> Proceedings of the conference on Design, automation and test in Europe - DATE &#39;08 </i> &nbsp;
Our aim is to balance it by proposing a formal design methodology that adheres to a weakened global design objective: the non-blocking composition of weakly endochronous processes, while preserving local  ...  The synchronous modeling paradigm provides strong execution correctness guarantees to embedded system design while making minimal environmental assumptions.  ...  A compositional design methodology Our static criterion for checking the composition of endochronous processes isochronous defines a cost-effective methodology for the integration of components in the  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1403375.1403598">doi:10.1145/1403375.1403598</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/cdankj2cj5gzlilalx3vkue6ee">fatcat:cdankj2cj5gzlilalx3vkue6ee</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170705105820/https://www.date-conference.com/proceedings-archive/PAPERS/2008/DATE08/PDFFILES/07.6_4.PDF" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/ec/54/ec54729378dd995ddac55a3788a3f063fe6d8207.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1403375.1403598"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

Modular design through component abstraction

David Berner, Jean-Pierre Talpin, Paul Le Guernic, Sandeep Kumar Shukla
<span title="">2004</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/h3qjmo5xyfe6fcrh4fogxmkkiq" style="color: black;">Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems - CASES &#39;04</a> </i> &nbsp;
This paper presents a methodology for modular design with the help of component abstraction.  ...  The presented methodology is illustrated by the detailed case study of a Finite Impulse Response filter.  ...  Our approach consists in putting the polychronous model of computation [13] to work in the context of system-level design languages such as SYSTEMC [16, 10] .  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1023833.1023862">doi:10.1145/1023833.1023862</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/cases/BernerTGS04.html">dblp:conf/cases/BernerTGS04</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/e5dxykkdpfgkdghuqgvizliwue">fatcat:e5dxykkdpfgkdghuqgvizliwue</a> </span>
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The Signal Synchronous Multiclock Approach to the Design of Distributed Embedded Systems

Abdoulaye Gamatie, Thierry Gautier
<span title="">2010</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/ll6bfs5o6bahfinh3u5z2cnyoy" style="color: black;">IEEE Transactions on Parallel and Distributed Systems</a> </i> &nbsp;
It shows the capability of the synchronous approach to apply formal techniques and tools that guarantee the reliability of the designed systems.  ...  It proposes a methodology that ensures a correct-by-construction functional implementation of these systems from highlevel models.  ...  LUSTRE, ESTEREL until recently), which consists of compact single-clocked designs, the polychronous approach aims at designing in a modular fashion systems with multiple loosely coupled clocks so as to  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/tpds.2009.125">doi:10.1109/tpds.2009.125</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/fiqgmzprcvc7nno7sfy3yly3xa">fatcat:fiqgmzprcvc7nno7sfy3yly3xa</a> </span>
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Compositional design of isochronous systems

Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, Loïc Besnard, Paul Le Guernic
<span title="">2012</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/hq6x4whtd5hhlhsxzculyeamey" style="color: black;">Science of Computer Programming</a> </i> &nbsp;
The synchronous modeling paradigm provides strong correctness guarantees for embedded system design while requiring minimal environmental assumptions.  ...  Our aim is to balance it by proposing a formal design methodology that adheres to a weakened global design objective: the nonblocking composition of weakly endochronous processes, while preserving local  ...  This yields a cost-effective methodology for the compositional design of globally asynchronous architectures starting from synchronous modules.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.scico.2010.06.006">doi:10.1016/j.scico.2010.06.006</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/57l4stvx25blnc3sp7qbick2sy">fatcat:57l4stvx25blnc3sp7qbick2sy</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170924054809/http://publisher-connector.core.ac.uk/resourcesync/data/elsevier/pdf/0f1/aHR0cDovL2FwaS5lbHNldmllci5jb20vY29udGVudC9hcnRpY2xlL3BpaS9zMDE2NzY0MjMxMDAwMTEzOQ%3D%3D.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/7a/9e/7a9e6d140e49d0249d42f4563e23748625cca4ae.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.scico.2010.06.006"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

A metamodel for the design of polychronous systems

Christian Brunette, Jean-Pierre Talpin, Abdoulaye Gamatié, Thierry Gautier
<span title="">2009</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/anq6kvwvqbegtipq5vfhvonzqq" style="color: black;">The Journal of Logic and Algebraic Programming</a> </i> &nbsp;
We demonstrate the agility of this approach by considering the design of both control-oriented and avionic systems.  ...  The synchronous paradigm provides a notion of deterministic concurrency which facilitates the functional modeling and analysis of embedded systems.  ...  of the domain-specific technology of POLYCHRONY: a semantic model that enables a modular design approach for polychronous systems, useful formal validation techniques and tools, and automatic code generation  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.jlap.2008.11.005">doi:10.1016/j.jlap.2008.11.005</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/m2npdf3ghnfntiqgkmus3dy43m">fatcat:m2npdf3ghnfntiqgkmus3dy43m</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170301174833/http://www.irisa.fr/prive/talpin/papers/jlap08.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/72/1b/721bb92f18b67330fb1fe83b7bbd2d0c1ad1d6fe.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.jlap.2008.11.005"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

Polychronous design of embedded real-time applications

Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic, Jean-Pierre Talpin
<span title="2007-04-01">2007</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/7dwkv5m7lfbbpi6he2w2suk6b4" style="color: black;">ACM Transactions on Software Engineering and Methodology</a> </i> &nbsp;
A great advantage is its convenience for component-based design approaches that enable modular development of increasingly complex modern systems.  ...  as single-clocked systems in a uniform way.  ...  ACKNOWLEDGMENTS We wish to thank David Berner and anonymous reviewers for their valuable comments on the previous versions of this article.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1217295.1217298">doi:10.1145/1217295.1217298</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/jtos7pkvtnfnlbr6vgp2z6cr5m">fatcat:jtos7pkvtnfnlbr6vgp2z6cr5m</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170829035604/https://www.dsi.fceia.unr.edu.ar/downloads/informatica/info_III/articulos%202010/Polychronous%20Design%20of%20Embedded-2007.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/ba/23/ba23adf952191e0c60737c6c7beacd75f0267a42.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/1217295.1217298"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

An alternative polychronous model and synthesis methodology for model-driven embedded software

Bijoy A. Jose, Sandeep K. Shukla
<span title="">2010</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/fkjmyf3l45eo5ovjdnpeqpdjd4" style="color: black;">2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)</a> </i> &nbsp;
Sequential embedded software from MRICDF specifications can be synthesized using epoch analysis, a technique proposed to form a unique order of events without a reference time line.  ...  Polychronous) specification languages do not assume that execution proceeds by sampling inputs at predetermined global synchronization points.  ...  These refinement choices for the designer makes polychronous specification more amenable to optimized code synthesis.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/aspdac.2010.5419925">doi:10.1109/aspdac.2010.5419925</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/aspdac/JoseS10.html">dblp:conf/aspdac/JoseS10</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/kjuksrvdgrc6lp6hbiktdt5arm">fatcat:kjuksrvdgrc6lp6hbiktdt5arm</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20141224011602/http://filebox.vt.edu/~bijoyaj/EmCodeSyn/MRICDF-ASP-DAC2010.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/fc/d5/fcd55e11f68e0360c4a14faaa5424c8d86a83287.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/aspdac.2010.5419925"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Formal semantics of behavior specifications in the architecture analysis and design language standard

Loıc Besnard, Thierry Gautier, Clement Guy, Paul Le Guernic, Jean-pierre Talpin, Brian R. Larson, Etienne Borde
<span title="">2016</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/4xfhwkuqw5f43mad6ock55mkeu" style="color: black;">2016 IEEE International High Level Design Validation and Test Workshop (HLDVT)</a> </i> &nbsp;
Such a repository enables automatic generation of analytical models for different aspects relevant to system design (timing, reliability, security, etc.).  ...  HLDVT Abstract-In system design, an architecture specification or model serves, among other purposes, as a repository to share knowledge about the system being designed.  ...  The authors wish to thank Pierre Dissaux and the SAE sub-committee on the AADL for supporting this work with valuable comments on the model and method presented in this paper.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/hldvt.2016.7748252">doi:10.1109/hldvt.2016.7748252</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/hldvt/BesnardGGGTLB16.html">dblp:conf/hldvt/BesnardGGGTLB16</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/cl2xk665zbhmbhoe7nh6evg2vy">fatcat:cl2xk665zbhmbhoe7nh6evg2vy</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180724124943/https://hal.inria.fr/hal-01419968/file/hldvt16.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/17/f0/17f02a779fb1965dcf6aaa5f86476c6ebafbf2a1.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/hldvt.2016.7748252"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Virtual prototyping AADL architectures in a polychronous model of computation

Yue Ma, Jean-Pierre Talpin, Thierry Gautier
<span title="">2008</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/u6xokkbfobfg7ogddh3jc7mgja" style="color: black;">2008 6th ACM/IEEE International Conference on Formal Methods and Models for Co-Design</a> </i> &nbsp;
We present a case study on the design of generic system architecture. The approach is being implemented in the framework of the ANR project TopCased.  ...  While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both synchronous and asynchronous  ...  Some related approaches are proposed to modeling nonsynchronous systems using synchronous languages and developing system level design methodology.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/memcod.2008.4547701">doi:10.1109/memcod.2008.4547701</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/memocode/YueTG08.html">dblp:conf/memocode/YueTG08</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/e5ewdq3w4je2dmam5b6qlltksu">fatcat:e5ewdq3w4je2dmam5b6qlltksu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170924094204/https://hal.inria.fr/inria-00265059/document" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/76/0f/760f2af4d1de45a0efbb4c8cbd1fa89d9beb3eb7.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/memcod.2008.4547701"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Generating Multi-Threaded code from Polychronous Specifications

Bijoy A. Jose, Hiren D. Patel, Sandeep K. Shukla, Jean-Pierre Talpin
<span title="">2009</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/uy5mv2ncw5eahkdx47hkrglxmm" style="color: black;">Electronical Notes in Theoretical Computer Science</a> </i> &nbsp;
With the widespread advent of multi-core processors, it is time for model-driven generation of efficient concurrent multi-threaded code.  ...  In generating sequential code, the concurrency expressed in the synchronous programs is sequentialized mostly because such embedded software was designed to run on single-core processors.  ...  In this paper, we investigate a noninvasive methodology for utilizing polychronous dataflow specifications, the only available compiler for such specification, and no change in the compiler, but still  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/j.entcs.2008.01.006">doi:10.1016/j.entcs.2008.01.006</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/kgptyq6bsfdivl5ipcowvhcqkm">fatcat:kgptyq6bsfdivl5ipcowvhcqkm</a> </span>
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Formal Semantics of Behavior Specifications in the Architecture Analysis and Design Language Standard [chapter]

Loïc Besnard, Thierry Gautier, Paul Le Guernic, Clément Guy, Jean-Pierre Talpin, Brian Larson, Etienne Borde
<span title="">2017</span> <i title="Springer Singapore"> Cyber-Physical System Design from an Architecture Analysis Viewpoint </i> &nbsp;
Such a repository enables automatic generation of analytical models for different aspects relevant to system design (timing, reliability, security, etc.).  ...  In system design, an architecture specification or model serves, among other purposes, as a repository to share knowledge about the system being designed.  ...  The authors wish to thank Pierre Dissaux, and all the SAE sub-committee on the AADL for valuable comments on the model and method presented in this work.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1007/978-981-10-4436-6_3">doi:10.1007/978-981-10-4436-6_3</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/5l2tm4wkyvgdngvbwvtf5lnsiy">fatcat:5l2tm4wkyvgdngvbwvtf5lnsiy</a> </span>
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Distributed Simulation of AADL Specifications in a Polychronous Model of Computation

Yue Ma, Jean-Pierre Talpin, Sandeep K. Shukla, Thierry Gautier
<span title="">2009</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/gkdds5vmbvfhdj6hneeduu2n3a" style="color: black;">2009 International Conference on Embedded Software and Systems</a> </i> &nbsp;
In this paper, we present a methodology to implement such an approach using the polychronous (multi-clocked synchronous) model of computation of the data-flow synchronous language SIGNAL.  ...  Yet, in a step-wise refinement based approach, one would prefer to model, simulate and validate such a system in a synchronous programming framework, and then automatically generate its GALS implementation  ...  Some related approaches are proposed to modeling nonsynchronous systems using synchronous languages and developing system level design methodology.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/icess.2009.47">doi:10.1109/icess.2009.47</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/icess/MaTSG09.html">dblp:conf/icess/MaTSG09</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/zkqw2rxfurc63mk53cqjehu2t4">fatcat:zkqw2rxfurc63mk53cqjehu2t4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170808070543/http://www.irisa.fr/prive/talpin/papers/icess09.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/cc/b4/ccb4b71bf311cf4c750b39ef61c142fedff5bcec.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/icess.2009.47"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Polychronous Analysis of Timing Constraints in UML MARTE

Huafeng Yu, Jean-Pierre Talpin, Loïc Besnard, Thierry Gautier, Frédéric Mallet, Charles André, Robert de Simone
<span title="">2010</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/icax7kbgefdxhgco4lvborrsqe" style="color: black;">2010 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops</a> </i> &nbsp;
The UML Profile for Modeling and Analysis of Real-Time and Embedded systems (MARTE) defines a broadly expressive Time Model to provide a generic timed interpretation for UML models.  ...  Hierarchization enables to identify the endochrony property in a system that allows code generation ensuring determinism.  ...  The model also supports a design methodology which goes from specification to implementation, from synchrony to asynchrony.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/isorcw.2010.10">doi:10.1109/isorcw.2010.10</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/isorc/YuTBGMAS10.html">dblp:conf/isorc/YuTBGMAS10</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/rxn5km3nmjdl3mvj557oaqpbkq">fatcat:rxn5km3nmjdl3mvj557oaqpbkq</a> </span>
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