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Phase Characterization for Power: Evaluating Control-Flow-Based and Event-Counter-Based Techniques

C. Isci, M. Martonosi
The Twelfth International Symposium on High-Performance Computer Architecture, 2006.  
There is need for real-system experiments that provide direct comparison of different practical techniques (such as control flow sampling, event counters, and power measurements) for gauging phase behavior  ...  Using this framework, we directly compare between code-oriented techniques (such as "basic block vectors") and performance counter techniques for characterizing power phases.  ...  Acknowledgments We would like to thank Gilberto Contreras, Belma Dogdas, James Donald, Qiang Wu and the members of the Pin mailing group for their help during the development of this work and for several  ... 
doi:10.1109/hpca.2006.1598119 dblp:conf/hpca/IsciM06 fatcat:lzqzyxxp3fcedfhp5wwheyxqdu

Efficient Program Power Behavior Characterization [chapter]

Chunling Hu, Daniel A. Jiménez, Ulrich Kremer
2007 Lecture Notes in Computer Science  
We improve the accuracy of our technique over previous work by using edge vectors, i.e., counts of traversals of control-flow edges, instead of basic block vectors, as well as incorporating event counters  ...  We present a program power behavior characterization infrastructure that identifies program phases, selects a representative interval of execution for each phase, and instruments the program to enable  ...  Isci and Martonosi [10] compare two techniques of phase characterization for power and demonstrate that the event-counter-based technique offers a lower average power phase classification errors.  ... 
doi:10.1007/978-3-540-69338-3_13 fatcat:564jhc43vne6pojsub2lhi56lq

Power-Sleuth: A Tool for Investigating Your Program's Power Behavior

Vasileios Spiliopoulos, Andreas Sembrant, Stefanos Kaxiras
2012 2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems  
The tool combines three techniques: a power and a performance estimation model with a program phase detection technique to deliver accurate, per-phase, per-frequency analysis.  ...  Our evaluation (against real power measurements) shows that we can accurately predict power and performance across different frequencies with average errors of 3.5% and 3.9% respectively.  ...  In this work, we focus on profiling, and we want to map the power profile back to the code, which control-flow-based phase detection does by default. VIII.  ... 
doi:10.1109/mascots.2012.36 dblp:conf/mascots/SpiliopoulosSK12 fatcat:vaswzsu4bjhltg2v5jgcu6xlay

Combining Edge Vector and Event Counter for Time-Dependent Power Behavior Characterization [chapter]

Chunling Hu, Daniel A. Jiménez, Ulrich Kremer
2009 Lecture Notes in Computer Science  
We improve the accuracy of our technique over previous work by using edge vectors, i.e., counts of traversals of control-flow edges, instead of basic block vectors, as well as incorporating event counters  ...  We present a program power behavior characterization infrastructure that identifies program phases, selects a representative interval of execution for each phase, and instruments the program to enable  ...  Isci and Martonosi [19] compare two techniques of phase characterization for power and demonstrate that the event-counter-based technique offers a lower average power phase classification errors.  ... 
doi:10.1007/978-3-642-00904-4_6 fatcat:4lnru56yzfgrlh7gmxcwegfzda

Processor power estimation techniques: a survey

Hameedah Sultan, Gayathri Ananthanarayanan, Smruti R. Sarangi
2014 International Journal of High Performance Systems Architecture  
We broadly focus on estimating power using system level models, architectural simulation, hardware performance counters, on-chip temperature profiles, and program execution profiles.  ...  We showcase a broad range of methods for power estimation using simulators, compilers, profilers, and sophisticated mathematical analysis routines.  ...  It starts out by characterizing the control path power consumption for a given instruction in a reference processor.  ... 
doi:10.1504/ijhpsa.2014.061448 fatcat:nh2vsgb2afhs5kdvcgoyyv7wsa

Power containers

Kai Shen, Arrvindh Shriraman, Sandhya Dwarkadas, Xiao Zhang, Zhuan Chen
2013 SIGPLAN notices  
This paper presents a new operating system facility called "power containers" that accounts for and controls the power and energy usage of individual fine-grained requests in multicore servers.  ...  control.  ...  Arrvindh Shriraman was supported by the Canadian NSERC Discovery grant, CRD 614093/569226, and Strategic 612142.  ... 
doi:10.1145/2499368.2451124 fatcat:7di7tar3ujciha7twak4fdtgd4

Power containers

Kai Shen, Arrvindh Shriraman, Sandhya Dwarkadas, Xiao Zhang, Zhuan Chen
2013 Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems - ASPLOS '13  
This paper presents a new operating system facility called "power containers" that accounts for and controls the power and energy usage of individual fine-grained requests in multicore servers.  ...  control.  ...  Arrvindh Shriraman was supported by the Canadian NSERC Discovery grant, CRD 614093/569226, and Strategic 612142.  ... 
doi:10.1145/2451116.2451124 dblp:conf/asplos/ShenSDZC13 fatcat:szcuwz2hbbbclpbfsfummeyauy

Run-time modeling and estimation of operating system power consumption

Tao Li, Lizy Kurian John
2003 Performance Evaluation Review  
Therefore, modeling OS power is imperative for accurate software power evaluation, as well as power management (e.g. dynamic thermal control and equal energy scheduling) in the light of OS-intensive workloads  ...  The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system.  ...  the correctly predicted control flow [16] .  ... 
doi:10.1145/885651.781048 fatcat:hid6dnj5dnaalh45jdauw7kque

Run-time modeling and estimation of operating system power consumption

Tao Li, Lizy Kurian John
2003 Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '03  
Therefore, modeling OS power is imperative for accurate software power evaluation, as well as power management (e.g. dynamic thermal control and equal energy scheduling) in the light of OS-intensive workloads  ...  The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system.  ...  the correctly predicted control flow [16] .  ... 
doi:10.1145/781027.781048 dblp:conf/sigmetrics/LiJ03 fatcat:e5ziy5fb7rhzfovdixadpjzwla

Run-time modeling and estimation of operating system power consumption

Tao Li, Lizy Kurian John
2003 Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '03  
Therefore, modeling OS power is imperative for accurate software power evaluation, as well as power management (e.g. dynamic thermal control and equal energy scheduling) in the light of OS-intensive workloads  ...  The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system.  ...  the correctly predicted control flow [16] .  ... 
doi:10.1145/781047.781048 fatcat:7dygkmh7hrcpdjatpmcuuixbcy

Full-system chip multiprocessor power evaluations using FPGA-based emulation

Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi
2008 Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08  
The design process for chip multiprocessors (CMPs) requires extremely long simulation times to explore performance, power, and thermal issues, particularly when operating system (OS) effects are included  ...  In response, our novel FPGA-based emulation methodology models a full CMP design including applications and an OS.  ...  Here, Ei is the energy per event i (for example, Figure 2 : Flow for assigning energy to events. a register file write) and ni is the event count.  ... 
doi:10.1145/1393921.1394010 dblp:conf/islped/BhattacharjeeCM08 fatcat:hl65r27wojhqddxpxqt6h3auce

Hybrid MPI/OpenMP power-aware computing

Dong Li, Bronis R de Supinski, Martin Schulz, Kirk Cameron, Dimitrios S. Nikolopoulos
2010 2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)  
In this paper we present and evaluate solutions for power-efficient execution of programs written in this hybrid model targeting large-scale distributed systems with multicore nodes.  ...  Prior research in this area has explored models and algorithms based on dynamic voltage and frequency scaling (DVFS) and dynamic concurrency throttling (DCT) to achieve power-aware execution of programs  ...  Based on these power and temperature estimates, they propose process scheduling algorithms. We use hardware event counters to capture statistical correlation between event samples and performance.  ... 
doi:10.1109/ipdps.2010.5470463 dblp:conf/ipps/LiSSCN10 fatcat:ii7wdiecofa7fnluje6eeifoiq

Power Quality Issues and Mitigation for Electric Grids with Wind Power Penetration

Sulaiman A. Almohaimeed, Mamdouh Abdel-Akher
2020 Applied Sciences  
Additionally, different techniques and technologies to mitigate the effect of such issues are discussed.  ...  This paper presents a classification of power quality issues, namely harmonics and short-duration voltage variation observed due to the integration of wind power.  ...  If the adopted technique is based on time variation instead [44, 47] , a linear approximation of (6), n = 1, is expressed as follows: (7) (8) An approximation used for (3) can also be utilized for evaluating  ... 
doi:10.3390/app10248852 fatcat:k2jxlkh7zzc45meiorwwq23feq

Coordinating System Software for Power Savings

Lingxiang Xiang, Jiangwei Huang, Tianzhou Chen
2008 2008 Second International Conference on Future Generation Communication and Networking  
This paper presents coordination mechanisms that integrate operating systems with compilers under power reduction techniques such as DPM and DVS.  ...  Innumerable methods and techniques have been exploited to address this problem but few concentrate on collaborative approaches.  ...  The appropriate frequency is obtained through the event-counters.  ... 
doi:10.1109/fgcn.2008.127 dblp:conf/fgcn/XiangHC08 fatcat:2kecyuhchvgfhhl7zpezjpqzce

Strategic Power Infrastructure Defense

Hao Li, G.W. Rosenwald, J. Jung, Chen-ching Liu
2005 Proceedings of the IEEE  
The proposed Strategic Power Infrastructure Defense (SPID) system methodology is a real-time, wide-area, adaptive protection and control system involving the power, communication, and computer infrastructures  ...  The SPID system performs the failure analysis, vulnerability assessment, and adaptive control actions to avoid catastrophic power outages.  ...  ACKNOWLEDGMENT The authors would like to thank the Advanced Power Technologies (APT) Center for their support in the work on flexible reconfiguration and other techniques for power and other critical infrastructures  ... 
doi:10.1109/jproc.2005.847260 fatcat:n4t4udhg7rbandqd5cg5w2f25u
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