Filters








29,351 Hits in 5.3 sec

Performance-aware speculation control using wrong path usefulness prediction

Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Patt
2008 High-Performance Computer Architecture  
One component of the mechanism is a simple, novel wrong-path usefulness predictor (WPUP) that can accurately predict whether or not wrong-path execution will be beneficial for performance.  ...  This paper proposes a comprehensive, low-cost speculation control mechanism that takes into account the usefulness of wrong-path execution, while effectively reducing the energy consumption due to useless  ...  Performance-Aware Speculation Control: WPUP and Branch-count Based Fetch Gating Our performance-aware speculation control technique consists of two prediction components as shown in Figure 5 : 1. a wrong-path  ... 
doi:10.1109/hpca.2008.4658626 dblp:conf/hpca/LeeKMP08 fatcat:eghcuesv5rf4fc5ftwxxihwjbq

Speculation-aware thread scheduling for simultaneous multithreading

D. Kang, J.-L. Gaudiot
2004 Electronics Letters  
Simulation results demonstrate that the proposed scheme not only significantly reduces the number of wrong-path instructions but also improves the instruction throughput.  ...  Efficient front-end thread scheduling for simultaneous multithreading, where priority given to a thread can be overridden if it suffers from an excessive amount of incorrectly speculated instructions,  ...  To build a fetch unit capable of controlling speculative execution and of reducing the number of wrong-path instructions, we propose our Speculation-Aware Front-End Throttling (SAFE-T) strategy, a novel  ... 
doi:10.1049/el:20040238 fatcat:tvisyfnd2bdvrjcqkmrxvkuu5m

A simple speculative load control mechanism for energy saving

Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero
2006 Proceedings of the 2005 workshop on MEmory performance DEaling with Applications, systems and architectures - MEDEA '06  
This paper describes a simple speculative control technique to prevent wrong-path load instructions from being executed.  ...  Our results show that the proposed mechanism reduces, on average, up to 26% misspeculated load instructions and 18% wrong-path instructions without any performance loss.  ...  Based on this observation, we propose a simple speculation control mechanism to reduce energy usage down wrong speculative paths, also avoiding performance degradation due to cache pollution and bus contention  ... 
doi:10.1145/1166133.1166137 fatcat:lkgyhayforb7xovr53wl7af5a4

Energy saving through a simple load control mechanism

Tanausú Ramírez, Alex Pajuelo, Oliverio J. Santana, Mateo Valero
2007 SIGARCH Computer Architecture News  
This paper describes a simple speculative control technique to prevent wrong-path load instructions from being executed.  ...  Our results show that the proposed mechanism reduces, on average, up to 26% misspeculated load instructions and 18% wrong-path instructions without any performance loss.  ...  Based on this observation, we propose a simple speculation control mechanism to reduce energy usage down wrong speculative paths, also avoiding performance degradation due to cache pollution and bus contention  ... 
doi:10.1145/1327312.1327318 fatcat:g6z3ddz6arhr3a4ew5y55ee3gq

Quantifying and reducing the effects of wrong-path memory references in cache-coherent multiprocessor systems

R. Sendag, A. Yilmazer, J.J. Yi, A.K. Uht
2006 Proceedings 20th IEEE International Parallel & Distributed Processing Symposium  
In order to reduce the performance impact of these wrong-path memory references, we introduce two simple mechanisms -filtering wrong-path blocks that are not likely-to-be-used and wrong-path aware cache  ...  Previous work that focused on uniprocessors showed that these wrong-path memory references may pollute the caches by bringing in data that are not needed on the correct execution path and by evicting useful  ...  Acknowledgments We would like to thank Thomas Wenisch and Babak Falsafi for supplying us with the em3d benchmark.  ... 
doi:10.1109/ipdps.2006.1639260 dblp:conf/ipps/SendagYYU06 fatcat:2upzdabgqjhgngpmikar6ntuya

Ginger

Andrew D. Hilton, Amir Roth
2007 Proceedings of the 34th annual international symposium on Computer architecture - ISCA '07  
When a branch mis-predicts, the wrong-path instructions up to the point where control converges with the correct path are selectively squashed and replaced with correct-path instructions.  ...  The negative performance impact of branch mis-predictions can be reduced by exploiting control independence (CI).  ...  serializes each instruction only with older mis-predicted branches on which it is control dependent (SP-CD-MF or SPeculative Control-Dependent Multiple-Flow).  ... 
doi:10.1145/1250662.1250716 dblp:conf/isca/HiltonR07 fatcat:4lkec54gzvhjxlr3l54etinrtm

Ginger

Andrew D. Hilton, Amir Roth
2007 SIGARCH Computer Architecture News  
When a branch mis-predicts, the wrong-path instructions up to the point where control converges with the correct path are selectively squashed and replaced with correct-path instructions.  ...  The negative performance impact of branch mis-predictions can be reduced by exploiting control independence (CI).  ...  serializes each instruction only with older mis-predicted branches on which it is control dependent (SP-CD-MF or SPeculative Control-Dependent Multiple-Flow).  ... 
doi:10.1145/1273440.1250716 fatcat:rq55k5gx2fbn5n2qi3zgp2vd4u

The impact of wrong-path memory references in cache-coherent multiprocessor systems

Resit Sendag, Ayse Yilmazer, Joshua J. Yi, Augustus K. Uht
2007 Journal of Parallel and Distributed Computing  
In order to reduce the performance impact of these WP memory references, we introduce two simple mechanisms-filtering WP blocks that are not likely-to-be-used and WP aware cache replacement-that yield  ...  The core of current-generation high-performance multiprocessor systems is out-of-order execution processors with aggressive branch prediction.  ...  Acknowledgments This research is supported in part by US National Science Foundation grant CCF-0541162.  ... 
doi:10.1016/j.jpdc.2007.03.005 fatcat:oziydlcesjbyvliyxl3zs45idi

Handling branches in TLS systems with Multi-Path Execution

Polychronis Xekalakis, Marcelo Cintra
2010 HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture  
Under the MP execution model, all paths following a number of hard-to-predict conditional branches are followed simultaneously.  ...  Thread-Level Speculation (TLS) has been proposed to facilitate the extraction of parallel threads from sequential applications.  ...  Unlike the bimodal predictors, these predictors are able to disambiguate branches based on the control-flow-path followed, so that wrong path training due to data dependent branches does not affect prediction  ... 
doi:10.1109/hpca.2010.5416632 dblp:conf/hpca/XekalakisC10 fatcat:qcoskuz2wrd37flqupkrwabyhy

An Analysis of the Performance Impact of Wrong-Path Memory References on Out-of-Order and Runahead Execution Processors

O. Mutlu, Hyesoon Kim, D.N. Armstrong, Y.N. Patt
2005 IEEE transactions on computers  
We find that wrong-path references are usually beneficial for performance because they prefetch data that will be used by later correct-path references.  ...  This paper examines the effects of wrong-path memory references on processor performance.  ...  This paper is an extended version of [17] , which appeared in the Proceedings of the Third Workshop on Memory Performance Issues, June 2004.  ... 
doi:10.1109/tc.2005.190 fatcat:vzghzzdxcvel7jhakpccj5gbse

Dynamic branch speculation in a speculative parallelization architecture for computer clusters

Joan Puiggali, Boleslaw K. Szymanski, Teo Jové, Jose L. Marzo
2012 Concurrency and Computation  
Unfolding paths following control structures makes it possible to break the control dependencies existing in the code and consequently to obtain a high degree of parallelism through the use of idle CPUs  ...  Our results demonstrate that code splitting in conjunction with branch speculation and the use of statistical information improves the performance measured by the number of processes executed in a time  ...  the usefulness of wrong-path episodes.  ... 
doi:10.1002/cpe.2872 fatcat:mbs3rvk2rjhhfoel6npmebbin4

Control speculation for energy-efficient next-generation superscalar processors

J.L. Aragon, J. Gonzalez, A. Gonzalez
2006 IEEE transactions on computers  
We propose Selective Throttling, which triggers different power-aware techniques (fetch throttling, decode throttling, or disabling the selection logic) depending on the branch prediction confidence level  ...  As next-generation high-performance processors become deeply pipelined, the amount of wasted energy due to misspeculated instructions will go up.  ...  ENERGY CONSUMPTION OF WRONG-PATH INSTRUCTIONS Processors use control flow speculation to predict the outcome of conditional branches.  ... 
doi:10.1109/tc.2006.32 fatcat:ruxmn7s7m5hn5h2ewkwi5ljnam

SPECCFI: Mitigating Spectre Attacks using CFI Informed Speculation [article]

Esmaeil Mohammadian Koruyeh, Shirin Haji Amin Shirazi, Khaled N. Khasawneh, Chengyu Song, Nael Abu-Ghazaleh
2019 arXiv   pre-print
In this paper, we propose to use Control-Flow Integrity (CFI), a security technique used to stop control-flow hijacking attacks, on the committed path, to prevent speculative control-flow from being hijacked  ...  We augment this protection with a precise speculation-aware hardware stack to constrain speculation on backward control-flow edges (returns).  ...  The advantage is that the same branch can have different predictions based on the control flow path used to reach it.  ... 
arXiv:1906.01345v2 fatcat:mml4274srjb3zfi3pmi7bo6wiu

B-Fetch: Branch Prediction Directed Prefetching for In-Order Processors

Reena Panda, Paul V. Gratz, Daniel A. Jimenez
2012 IEEE computer architecture letters  
In this paper, we introduce B-Fetch, a new technique for data prefetching which combines branch prediction based lookahead deep path speculation with effective address speculation, to efficiently improve  ...  performance in in-order processors.  ...  Whenever the cumulative path confidence falls below a threshold value, indicating a likely wrong path prediction, the lookahead process is terminated.  ... 
doi:10.1109/l-ca.2011.33 fatcat:4tppewxqafbg5arljwxzhjrzue

Transparent control independence (TCI)

Ahmed S. Al-Zawawi, Vimal K. Reddy, Eric Rotenberg, Haitham H. Akkary
2007 Proceedings of the 34th annual international symposium on Computer architecture - ISCA '07  
Transparent control independence (TCI) yields a highly streamlined pipeline that quickly recycles resources based on conventional speculation, enabling a large window with small cyclecritical resources  ...  Superscalar architectures have been proposed that exploit control independence, reducing the performance penalty of branch mispredictions by preserving the work of future misprediction-independent instructions  ...  So, CI-speculate achieves the performance of speculation by not degrading performance when a branch is correctly predicted.  ... 
doi:10.1145/1250662.1250717 dblp:conf/isca/Al-ZawawiRRA07 fatcat:yhnymgwllvbkfnegvjv4vzc5fu
« Previous Showing results 1 — 15 out of 29,351 results