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FPGA Based Pico-second Time Measurement System for a DIRC-like TOF Detector
[article]
2018
arXiv
pre-print
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It is very compact, cost effective with a high multi-channel capacity and short measurement dead time, which is very suitable for practical applications of large-scale high performance TOF detectors in ...
The test results demonstrate that the FPGA based front-end electronics could achieve an excellent time performance for TOF detectors. ...
Electronics Performance Test We built an experiment setup to test the performance of the pico-second time measurement system using β-ray in our lab. ...
arXiv:1806.02495v1
fatcat:m7kzmw2lsrhvffx7tnw3yekwjy
USING ARTIFICIAL INTELLIGENCE ACCELERATORS TO TRAIN COMPUTER GAME CHARACTERS
2021
Computer Systems and Information Technologies
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A reasonable choice of hardware solutions that are most effective for the implementation of the task. Possibilities of practical use of the artificial intelligence accelerator are investigated. ...
A review of the literature has shown that today, given the complexity of computational processes and the high cost of these processes, the gaming computer industry needs to improve hardware and software ...
In-depth learning can be effectively optimized and scaled on multi-core HPC systems. ...
doi:10.31891/csit-2021-3-9
fatcat:dl2ymnkuavba7ie3gzf7vue22i
Hardware computing for brain network analysis
2010
2nd Asia Symposium on Quality Electronic Design (ASQED)
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On the other hand, the research on brain networks plays a vital role in understanding the connectivity patterns of the human brain and disease-related alterations. ...
In this work, we inject the power of heterogeneous hardware computing into the brain network research, to help the research on the connectivity patterns of both normal and diseased brains. ...
It makes large-scale voxel-based brain network analysis applicable on large number of subjects. ...
doi:10.1109/asqed.2010.5548242
fatcat:hne54kgrwve2lpe6njsmsnq4li
A coarse-grained stream architecture for cryo-electron microscopy images 3D reconstruction
2012
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays - FPGA '12
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In this paper, we exploit this trend towards FPGA-based accelerator design and provide a proof-of-concept and comprehensive case study on FPGA-based accelerator design for a single-particle 3D reconstruction ...
The wide acceptance and the data deluge in the bioinformatics and medical imaging processing require more efficient and application-specific systems to be built. ...
that leverages FPGAs to accelerate large-scale scientific applications. ...
doi:10.1145/2145694.2145719
dblp:conf/fpga/WangDTZTZS12
fatcat:tb63lp3urvcdfhe5njamqngm24
Real-time Data Acquisition and Processing System for MHz Repetition Rate Image Sensors
[article]
2018
arXiv
pre-print
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It is a 1D image acquisition system which solves several challenges related to capturing, buffering, processing and transmitting large data streams with use of the FPGA device. ...
The solution presented in the paper is probably one of the world fastest line cameras. ...
The HOLD solution is built with a Xilinx 7-Series FPGA device which provides the processing power and most of the high-performance interfaces. Its structure is presented in Figure 3 . ...
arXiv:1806.10456v1
fatcat:6gya64wgtfgrflnvjdhe67fawi
High-temperature (>500°C) reconfigurable computing using silicon carbide NEMS switches
2011
2011 Design, Automation & Test in Europe
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Many industrial systems, sensors and advanced propulsion systems demand electronics capable of functioning at high ambient temperature in the range of 500-600°C. ...
We propose a novel multi-layer NEMS switch structure and efficient design of each building block of FPGA using nanoscale SiC NEMS switches. ...
Among different transistor device structures, junction field effect transistors (JFET) have been most promising in terms of reliable manufacturability and device characteristics as well as large scale ...
doi:10.1109/date.2011.5763175
dblp:conf/date/WangNKWRLMB11
fatcat:3e2jbteanfdsxkcbjtzy44nipq
Synthesis of networks of custom processing elements for real-time physical system emulation
2013
ACM Transactions on Design Automation of Electronic Systems
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Many large physical systems are homogenous systems with only a few (<5) types of ODEs replicated many times, (e.g., atrial cell model of Figure 1 ). ...
The atrial cell model executes about 100x faster on a network of custom PEs on a mid-range FPGA than on a modern desktop processor. ...
Note that the plot's y-axis scale is logarithmic because of the large differences in performance on different platforms. ...
doi:10.1145/2442087.2442092
fatcat:grizpjcxqfccrd5ukrqwy3hubq
FPGA Design Framework Combined with Commercial VLSI CAD
2013
IEICE transactions on information and systems
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Second, the accuracy of the VPR performance results is inadequate for the evaluation of a complete FPGA IP in a design that targets the production of LSI. ...
VPR calculates area and timing using target FPGA architecture and physical information. However, it cannot be used in FPGA IP design efficiently for two reasons. ...
Acknowledgments This work was supported by the VLSI Design and Education Center (VDEC) of the University of Tokyo in collaboration with Synopsys, Inc., Cadence Design System, Inc., and Mentor Graphics, ...
doi:10.1587/transinf.e96.d.1602
fatcat:quem56ufirhpxma7ts23owiz7y
A Submatrix-Based Method for Approximate Matrix Function Evaluation in the Quantum Chemistry Code CP2K
[article]
2020
arXiv
pre-print
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To perform these quantum-mechanical DFT calculations on complex large-scale systems, so-called linear scaling methods instead of conventional cubic scaling methods are required. ...
Electronic structure calculations based on density-functional theory (DFT) represent a significant part of today's HPC workloads and pose high demands on high-performance computing resources. ...
The support of Tobias Kenter and Paolo Gorlani from PC 2 with running the FPGA tests is gratefully acknowledged. ...
arXiv:2004.10811v3
fatcat:7vueyuyyezbz7g3h4snzg7cnei
Electromagnetic Occlusion Algorithm Based on FPGA and Panel Grouping and Its Optimization
2021
Wireless Communications and Mobile Computing
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Because the amount of data processed here is not very large, the cache part directly uses the on-chip storage resources of the FPGA, and the AD device is used to perform analog-to-digital/digital-to-analog ...
Open MP parallelization of the occlusion algorithm is as follows: The physical optics method is used to calculate the target RCS, and the focus of parallelism is placed on the part with a large amount ...
Acknowledgments This work was supported by the Natural Science Foundation of Inner Mongolia Autonomous Region of China (2018MS01022) and Planning Project of Inner Mongolia Autonomous Region of China (NGJGH2017181 ...
doi:10.1155/2021/2048777
fatcat:m25l462fb5g2zfleq3uegvapqe
An FPGA-Based MIMO and Space-Time Processing Platform
2006
EURASIP Journal on Advances in Signal Processing
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This paper follows the analysis and the consequential development of a flexible FPGA-based processing system. ...
Various pitfalls associated with the implementation of MIMO algorithms in real time are highlighted, and finally, the development requirements for this FPGA-based solution are given to aid comparison with ...
Thanks are due to Andrew Jones for his RF and platform design and the diagrams of Figures 1 and 2 . Finally, the efforts of the entire Tait Electronics Ltd. ...
doi:10.1155/asp/2006/34653
fatcat:4vrqdl6ffzejdifqnlkyi3raaa
The design of a flexible Global Calorimeter Trigger system for the Compact Muon Solenoid experiment
2007
Journal of Instrumentation
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The Global Calorimeter Trigger is the last element in the processing of calorimeter data, and provides most of the input to the final Level-1 decision. ...
We have developed a novel design of triggering system as part of the pipelined hardware Level-1 trigger logic for the CMS experiment at LHC. ...
Acknowledgements The authors would like to thank the following for useful discussions on the project: Steve Quinton, Rob Halsall and John Maddox of Engineering and Instrumentation Division at Rutherford ...
doi:10.1088/1748-0221/2/10/p10002
fatcat:tpnpggfevvaxpjezuog66kmu3i
The FPGA Pixel Array Detector
2013
Nuclear Instruments and Methods in Physics Research Section A : Accelerators, Spectrometers, Detectors and Associated Equipment
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FPGA resources can be allocated to perform user defined tasks on the pixel data streams, including the implementation of a direct time autocorrelation function (ACF) with time resolution down to 100 ns ...
The FPGA-ASIC high-speed interface, as well as the in-FPGA implementation of a real-time ACF for x-ray photon correlation spectroscopy experiments has been designed and simulated. ...
Testing ASIC electronics Two methods of testing the electronics of the 16 Â 16 array are built into the ASIC. ...
doi:10.1016/j.nima.2012.10.024
fatcat:hbknbztn7bfehgxwc2j65ykh2m
Time delay reservoir computing with VCSEL
2020
AI and Optical Data Sciences
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In this work, we review the recent work on photonic reservoirs and describe our recent results on the implementation of a single node system based on multi-mode optical interconnect technology developed ...
than for a fully deterministic system. ...
A fiber-based experimental system was built and operated to perform a distorted signal recovery task. ...
doi:10.1117/12.2544981
fatcat:33ps2nxnrjhkjazbjwzpkh4hgu
Canadian Hydrogen Intensity Mapping Experiment (CHIME) Pathfinder
[article]
2014
arXiv
pre-print
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2014
Ground-based and Airborne Telescopes V
unpublished
doi:10.1117/12.2054950 fatcat:6fr52ps5bnevnfsr7ab23235fm
doi:10.1117/12.2054950 fatcat:6fr52ps5bnevnfsr7ab23235fm
The correlator is an FX design, where the Fourier transform channelization is performed in FPGAs, which are interfaced to a set of GPUs that compute the correlation matrix. ...
The instrument is a hybrid cylindrical interferometer designed to measure the large scale neutral hydrogen power spectrum across the redshift range 0.8 to 2.5. ...
We acknowledge support from the Canada Foundation for Innovation, the Natural Sciences and Engineering Research Council of Canada, the B.C. ...
arXiv:1406.2288v1
fatcat:mlcoheypnzeb7px6alap3jxut4
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