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Robust signaling techniques for through silicon via bundles

Krishna C. Chillara, Jinwook Jang, Wayne P. Burleson
2011 Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '11  
However in Deep Sub Micron (DSM) technologies, scaling of interconnect is not in proportion to that of devices.  ...  Designing an efficient power distribution network in Deep Sub Micron (DSM) technologies has been the biggest challenge.  ... 
doi:10.1145/1973009.1973089 dblp:conf/glvlsi/ChillaraJB11 fatcat:i6fikoskfbcqhcj7a2ch6fplii

Signal Integrity: Fault Modeling and Testing in High-Speed SoCs [chapter]

Mehrdad Nourani, Amir Attarha, Krishnendu Chakrabarty
2002 SOC (System-on-a-Chip) Testing for Plug and Play Test Automation  
As we approach 100nm technology the interconnect issues are becoming one of the main concerns in the testing of gigahertz system-onchips.  ...  Voltage distortion (noise) and delay violations (skew) contribute to the signal integrity loss and ultimately functional error, performance degradation and reliability problems.  ...  Acknowledgement The authors thank Nagaraj NS (Texas Instruments, Inc.) and Jerry Tallinger (OEA International, Inc.) for providing their simulator packages and helpful comments.  ... 
doi:10.1007/978-1-4757-6527-4_12 fatcat:cxgzdzhu3becxlez7t2kjuvfwe

Maximizing throughput over parallel wire structures in the deep submicrometer regime

D. Pamunuwa, Li-Rong Zheng, H. Tenhunen
2003 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
Our analysis and results are valid for lossy interconnects as are typical of wires in sub-micron technologies.  ...  In a parallel multiwire structure, the exact spacing and size of the wires determine both the resistance and the distribution of the capacitance between the ground plane and the adjacent signal carrying  ...  Our analysis and results are valid for lossy interconnects as are typical of wires in sub-micron technologies.  ... 
doi:10.1109/tvlsi.2003.810800 fatcat:rhmmterxyrd5jpwhzwmtk26lke

Stacked strained silicon transistors for low-power high-performance circuit applications

H. Ramakrishnan, S. Shedabale, G. Russell, A. Yakovlev
2008 2008 58th Electronic Components and Technology Conference  
This thesis explores the applicability of this technology to low-power and high-speed digital and analogue designs by analyzing the power and performance characteristics of a range of circuits.  ...  These tools permitted the identification and modelling of those process parameters whose variation would have the greatest impact on circuit performance.  ...  New statistical technique need to be introduced to perform the variability analysis of deep sub-micron devices which are more prone to process variability.  ... 
doi:10.1109/ectc.2008.4550224 fatcat:ijp5zrokxbebrlv5w2b7ua2c44

RSFQ TECHNOLOGY: PHYSICS AND DEVICES [chapter]

PAUL BUNYK, KONSTANTIN LIKHAREV, DMITRY ZINOVIEV
2001 Selected Topics in Electronics and Systems  
The drawbacks of this technology include the necessity of deep (liquid-helium-level) cooling of RSFQ circuits and the rudimentary level of the currently available fabrication and testing facilities.  ...  The objective of this paper is to review RSFQ device physics and also discuss in brief the prospects of future development of this technology in the light of the tradeoff between its advantages and handicaps  ...  Acknowledgments Fruitful discussions with numerous colleagues, and valuable comments by T.  ... 
doi:10.1142/9789812810014_0009 fatcat:7o3ybptlzffnzgi4dwwpu5v2cm

RSFQ TECHNOLOGY: PHYSICS AND DEVICES

PAUL BUNYK, KONSTANTIN LIKHAREV, DMITRY ZINOVIEV
2001 International Journal of High Speed Electronics and Systems  
The drawbacks of this technology include the necessity of deep (liquid-helium-level) cooling of RSFQ circuits and the rudimentary level of the currently available fabrication and testing facilities.  ...  The objective of this paper is to review RSFQ device physics and also discuss in brief the prospects of future development of this technology in the light of the tradeoff between its advantages and handicaps  ...  Acknowledgments Fruitful discussions with numerous colleagues, and valuable comments by T.  ... 
doi:10.1142/s012915640100085x fatcat:hatp3spntvgrzn2q6idxckaa3q

Chapter 1 [chapter]

2018 Passive Micro-Optical Alignment Methods  
Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the consequences of their  ...  , and recording, or in any information storage or retrieval system, without written permission from the publishers.  ...  The nominal size was 4 × 13 mm, and the chip employed special on-chip dynamic control circuits to adjust logic decision levels under the presence of long run lengths of NRZ data.  ... 
doi:10.1201/9781420027723-5 fatcat:enlpj7g6p5ax5fmfncue2gfmni

Future trends in microelectronics - reflections on the road to nanotechnology

1997 Precision engineering  
the data needed, and completing and reviewing the collection of information.  ...  information Operations and Reports, 1215 Jefferson Davis Highway, Suite 1204, Arlington, VA 22202-4302, and to the Office of Management and Budget, Paperwork Reduction Project (0704-0188), Washington,  ...  Initial results are found in [6] and [4]. Acknowledgment. The work at the University of Virginia has been partially supported by the ONR (Project Monitor Max Yoder). References.  ... 
doi:10.1016/0141-6359(97)90048-9 fatcat:j7blw4wn6zbitmoqqffj46g54e

Roadmap on emerging hardware and technology for machine learning

Qiangfei Xia, Karl K Berggren, Konstantin Likharev, Dmitri B Strukov, Hao Jiang, Thomas Mikolajick, Damien Querlioz, Martin Salinga, John Erickson, Shuang Pi, Feng Xiong, Peng Lin (+31 others)
2020 Nanotechnology  
However, it is the performance of the hardware, in particular the energy efficiency of a computing system that sets the fundamental limit of the capability of machine learning.  ...  Recent progress in artificial intelligence is largely attributed to the rapid development of machine learning, especially in the algorithm and neural network models.  ...  Can Li for their help in preparing this section of roadmap.  ... 
doi:10.1088/1361-6528/aba70f pmid:32679577 fatcat:t6me4pfxgfhdvbdqjnyjuksf2e

Surveillance on Manycasting Over Optical Burst Switching (OBS) Networks under Secure Sparse Regeneration

C.Veera lakshmi
2013 IOSR Journal of Electronics and Communication Engineering  
This dynamic movement of the destinations in the group decreases blocking effect.  ...  In wavelength-routed WDM optical networks requires regeneration for few light paths, when the strength of optical signal reduced and also security and privacy are essential before Optical Burst Switching  ...  ., Head of the Department of Electronics and Communication Engineering, M.kumarasamy College of Engineering, Karur, who have contributed towards development of work.  ... 
doi:10.9790/2834-0460108 fatcat:5qasfbq4n5cbpln42h3pa3cucq

On-Chip Surfing Interconnect [chapter]

Suwen Yang, Mark Greenstreet
2012 Advanced Circuits for Emerging Technologies  
However, these latches increase latency and power consumption. In 2002, a novel circuit technique called "surfing" was proposed to bound the timing uncertainty in wave pipelines [57] .  ...  Repeaters in a buffering technique amplify clock jitter and drop pulses due to intersymbol interference. Latches can be inserted in place of some of the buffers to control the timing variation.  ...  With wide separation between lines, the ratios of mutual inductance to self inductance and coupling capacitance to total capacitance are less than 0.1. We ignore these parameters in the table.  ... 
doi:10.1002/9781118181508.ch16 fatcat:n2ijhbjlrbe63bi6vhbrwexa3a

Modeling and analysis of crosstalk coupling effect on the victim interconnect using the ABCD network model

A.K. Palit, V. Meyer, W. Anheier, J. Schloeffel
19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings.  
The paper describes an ABCD modeling approach of a victim interconnect that takes into account the crosstalk coupling effect due to aggressor line in deep sub-micron chips.  ...  Various timing issues related to signal waveform such as, delay time, overshoot and undershoot occurrence time etc., that in effect help to ensure in prior the desired signal integrity (SI) and performance  ...  Acknowledgments The research work was supported by the German Federal Ministry of Education and Research (BMBF) in the project AZTEKE under contract number 01M3063C.  ... 
doi:10.1109/dftvs.2004.1347838 fatcat:htsdl4yzdrfjxothcjkkmxvmta

ABCD modeling of crosstalk coupling noise to analyze the signal integrity losses on the victim interconnect in DSM chips

A.K. Palit, V. Meyer, W. Anheier, J. Schloeffel
18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design  
The paper proposes an ABCD modeling approach to model the crosstalk coupling noise on the victim interconnect due to single / multiple aggressor(s) in deep sub-micron (DSM) chips.  ...  Various timing issues related to signal waveform such as, delay time, overshoot and undershoot occurrence time etc., that in effect help to ensure in prior the desired signal integrity (SI) and performance  ...  Acknowledgements This research work was supported by German Federal Ministry of Education and Research in the AZTEKE project under the contract number 01M3063C.  ... 
doi:10.1109/icvd.2005.40 dblp:conf/vlsid/PalitMAS05 fatcat:vs44kvyv7vdwljtmdak4amp3ba

Proceedings of 47th Annual Device Research Conference (papers in summary form only received)

1989 IEEE Transactions on Electron Devices  
Of particular importance are the effects of the buffer layer on electron confinement and the ability to recess sub-100-nm gates uniformly to optimize mutual conductance.  ...  a wide range of channel lengths and widths spanning micron and submicron regimes.  ... 
doi:10.1109/16.43784 fatcat:vhehdquqlvgcvor4pqgjcsw3ve

Roadmap on all-optical processing

Paolo Minzioni, Cosimo Lacava, Takasumi Tanabe, Jianji Dong, Xiaoyong Hu, Gyorgy Csaba, Wolfgang Porod, Ghanshyam Singh, Alan E Willner, Ahmed Almaiman, Victor Torres-Company, Jochen Schröder (+20 others)
2019 Journal of Optics  
The opinions expressed in this publication are those of the authors and do not necessarily reflect the views of the John Templeton Foundation.  ...  This work was supported in part from a grant from the John Templeton Foundation (JTF #60478).  ...  Micro-Raman analysis performed on the laser induced modification showed the presence of amorphous carbon rather than graphite.  ... 
doi:10.1088/2040-8986/ab0e66 fatcat:6zg52wqctvgldeddmehkezzjnq
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