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Page 14 of University Computing : The Bulletin of the IUCC Vol. 9, Issue 1 [page]

1987 University Computing : The Bulletin of the IUCC  
Performance Study of Ring Structured LANs using Register Inser- tion, Angewandte Informatik 3 (March 1985), 120-126. M351, Numerical Computation (The Open University Press, 1985). Hafner, E.  ...  Performance study of loop networks using buffer insertion, Computer net- works 3 (December 1979), 419-425. 10 — _ 14 S 2( ~ 2 —_ Reames, C. C. & Liu, M. T.  ... 

Page 142 of University Computing : The Bulletin of the IUCC Vol. 11, Issue 3 [page]

1989 University Computing : The Bulletin of the IUCC  
Performance study of ring structured local area networks using register insertion. Angewandt Informatik 3 (1985), 120-6.  ...  An approach to the simulation of various Local Area Network topologies, Internal report, Department of Computer Science, University of Hull.  ... 

An introduction to local area networks

D.D. Clark, K.T. Pogran, D.P. Reed
1978 Proceedings of the IEEE  
While mrny protocd probkm6 are wmmm to leal -8 netwadrs d loaghml networtr atcb as the ARPANET, new protocds 8re requid to explat the extended clprbilitier of leal area network cainectioa of loal area  ...  There .re two basic issues m loal area netwak desi@.  ...  register insertion.  ... 
doi:10.1109/proc.1978.11152 fatcat:momgta2yq5chdd2svlqxhbma4i

Approximate analysis of single and multiple ring networks

L.N. Bhuyan, D. Ghosal, Q. Yang
1989 IEEE transactions on computers  
This paper presents performance models of single and multiple ring networks based on token ring, slotted ring, and register insertion ring protocols.  ...  An approximate and uniform analysis, based on the gated M/G/l queueing model, has been developed to evaluate the performance of both existing single ring networks and the proposed multiple ring networks  ...  Analysis of Single Token Ring Network The basic structure of the local area ring network assumed by Sethi and Saydam [21] consists of a ring with M stations located on it.  ... 
doi:10.1109/12.30853 fatcat:ph2jusnz2jfsbh52raw7wu4254

Clock Distribution Networks in 3-D Integrated Systems

Vasilis F. Pavlidis, Ioannis Savidis, Eby G. Friedman
2011 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
A comparison of three 3-D clock distribution network topologies is presented in this paper.  ...  The measurements suggest that each topology provides certain advantages and disadvantages in terms of different performance criteria.  ...  Wu of the University of Rochester for their help during testing and the MIT Lincoln Laboratories for fabricating the 3-D test circuit.  ... 
doi:10.1109/tvlsi.2010.2073724 fatcat:ey27ndrrtfczdcq74usluvutia

Routing brain traffic through the von Neumann bottleneck: Efficient cache usage in spiking neural network simulation code on general purpose computers [article]

Jari Pronold, Jakob Jordan, Brian J. N. Wylie, Itaru Kitayama, Markus Diesmann, Susanne Kunkel
2022 arXiv   pre-print
Using an established neuronal network simulation code as a reference implementation, we investigate how common techniques to recover cache performance such as software-induced prefetching and software  ...  Simulation is a third pillar next to experiment and theory in the study of complex dynamic systems such as biological neural networks.  ...  Acknowledgments We are grateful to Mitsuhisa Sato for his guidance, which helped us shape the project, to Johanna Senk and Dennis Terhorst for fruitful discussions and joint efforts at the HPC Optimisation  ... 
arXiv:2109.12855v2 fatcat:ac5jkpddmnh5nago3klckipt6e

On-chip interconnects and instruction steering schemes for clustered microarchitectures

J.-M. Parcerisa, J. Sahuquillo, A. Gonzalez, J. Duato
2005 IEEE Transactions on Parallel and Distributed Systems  
The results show that these pointto-point interconnects achieve much better performance than bus-based ones, and that the connectivity of the network together with effective steering schemes are key for  ...  This new class of interconnects has demands and characteristics different from traditional multiprocessor networks.  ...  The research conducted in this paper has been developed using the resources of the European Center for Parallelism of Barcelona (CEPBA).  ... 
doi:10.1109/tpds.2005.23 fatcat:d653755qevf45gtiibunn3rwxi

Efficient Shellcode Detection on Commodity Hardware

Donghai TIAN, Mo CHEN, Changzhen HU, Xuanya LI
2013 IEICE transactions on information and systems  
To improve the performance of our system, we make use of the multi-core technology.  ...  impose considerable performance overhead.  ...  To ensure concurrent operations on the ring buffer without using locks, the producer (i.e., Network Sniffer) needs to invoke the Enqueue function to insert the network data into the buffer (Line 11∼19)  ... 
doi:10.1587/transinf.e96.d.2272 fatcat:ngreimqzc5bgvmcgbdc7nqfbee

Architectural approach to the role of optics in monoprocessor and multiprocessor machines

Jacques Henri Collet, Daniel Litaize, Jan Van Campenhout, Chris Jesshope, Marc Desmulliez, Hugo Thienpont, James Goodman, Ahmed Louri
2000 Applied Optics  
Therefore the higher the connectivity ͑possibly with optics͒, the shorter the path to another node, but the more expensive the network and the more complex the structure of electronic nodes.  ...  The relevance of introducing optical interconnects ͑OI's͒ in monoprocessors and multiprocessors is studied from an architectural point of view.  ...  This study partly summarizes the conclusions of the Workshop on Optical Communications and Computer Sciences ͑WOCCS͒ that was held in Toulouse, France, in March 1999.  ... 
doi:10.1364/ao.39.000671 pmid:18337941 fatcat:mowm54a6b5bidk3v5epnutx2a4

The application accuracy of the frameless implantable marker system and analysis of related affecting factors [chapter]

Qinghang Li, Lucia Zamorano, Zhaowei Jiang, Fernando Vinas, Fernando Diaz
1998 Lecture Notes in Computer Science  
The purpose of this study was to determine the application accuracy of a new framelass marker system for interactive imraoperative localization of intracranial lesions.  ...  Image data were loaded into a SUN Workstation and registered with NSPS.4.0 software. The coordinate of each fiducial marker was recorded into a file as the reference.  ...  One is localized around the area 6 x 6 cm, which is close to surgical area and easy to do the registration.  ... 
doi:10.1007/bfb0056208 fatcat:kehig7mmjbgwxptrjke6imjhq4

Experimental analysis of a ring oscillator network for hardware trojan detection in a 90nm ASIC

Andrew Ferraiuolo, Xuehui Zhang, Mohammad Tehranipoor
2012 Proceedings of the International Conference on Computer-Aided Design - ICCAD '12  
This work analyzes the impact of Trojans with varied partial activity, area, and location on the proposed ring oscillator structure and demonstrates that stealthy Trojans can be efficiently detected with  ...  This paper details the implementation and analysis of a novel ring oscillator network technique for Trojan detection in an application specific integrated circuit (ASIC).  ...  The number of ROs, N RO , to be used may be adjusted based on the area of the chip, the power structure of the chip, and the area that may be used to implement the RON structure [2] .  ... 
doi:10.1145/2429384.2429392 dblp:conf/iccad/FerraiuoloZT12 fatcat:4owu6d7ourbmzkaumqmc7sqidq

Power and performance evaluation of globally asynchronous locally synchronous processors

Anoop Iyer, Diana Marculescu
2002 SIGARCH Computer Architecture News  
Hence the study of Globally Asynchronous Locally Synchronous (or GALS) systems is relevant.  ...  In this paper we use a cycleaccurate simulation environment to study the impact of asynchrony in a superscalar processor architecture.  ...  Metal grids provide a regular structure to facilitate the early design and characterization of the clock network.  ... 
doi:10.1145/545214.545233 fatcat:eh2rdird5bbs3bytve5o5bqeau

Design and Evaluation of Hierarchical Rings with Deflection Routing

Rachata Ausavarungnirun, Chris Fallin, Xiangyao Yu, Kevin Kai-Wei Chang, Greg Nazario, Reetuparna Das, Gabriel H. Loh, Onur Mutlu
2014 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing  
of the vast majority of network traffic.  ...  Hierarchical ring networks, which hierarchically connect multiple levels of rings, have been proposed in the past to improve the scalability of ring interconnects, but past hierarchical ring designs sacrifice  ...  We acknowledge the support of AMD, IBM, Intel, and Qualcomm. This research was partially supported by ISTC-CC, NSF (CCF 0953246 and CCF 1212962), and SRC.  ... 
doi:10.1109/sbac-pad.2014.31 dblp:conf/sbac-pad/AusavarungnirunFYCNDLM14 fatcat:oniwh2qpi5bg7owgscmw4jivu4

Distributed Overlay Anycast Table using Space filling curves [article]

Eleni Mykoniati, Laurence Latif, Raul Landa, Ben Yang, Richard G. Clegg, David Griffin, Miguel Rio
2013 arXiv   pre-print
The DOAT makes use of network delay coordinates and a space filling curve to achieve locality-aware routing across the overlay, and Bloom filters to aggregate group identifiers.  ...  One application is in locality-aware peer-to-peer networks, where peers need to discover low-latency peers participating in the distribution of a particular file or stream.  ...  EVALUATION The performance of the DOAT system for a single anycast group is evaluated using a discrete event simulator.  ... 
arXiv:1303.6881v1 fatcat:ibmxqtdtozg4vnarkgstc7cv2i

Using simulations of reduced precision arithmetic to design a neuro-microprocessor

Krste Asanović, Nelson Morgan, John Wawrzynek
1993 Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology  
The RAP system played a critical role in this study, enabling us to experiment with much larger networks than would otherwise be possible.  ...  We have used the RAP to simulate variable precision arithmetic to guide us in the design of arithmetic units for high performance neurocomputers to be implemented with custom VLSI.  ...  Acknowledgments This report is part of a related chain of projects involving contributors from both the Computer Science Division at Berkeley and the Realization Group at ICSI.  ... 
doi:10.1007/bf01581957 fatcat:mjifpmlstzcajjeabbkq76njau
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