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Temperature-Aware Design and Management for 3D Multi-Core Architectures
2014
Foundations and Trends® in Electronic Design Automation
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Thomas Brunschwiler from IBM Zurich, for their support with the discussions on the liquid cooling modeling and experiments of the different thermal management strategies of 3D MPSoC stacks with liquid ...
Coskun from Boston University, and Dr. Bruno Michel and Dr. ...
At each time interval, a new set of workloads arrives, and the management scheme allocates these tasks to various cores and sets the corresponding flow rate such that the predicted peak temperature is ...
doi:10.1561/1000000032
fatcat:niq3pl6tjzfn5aewn3ruskrk5u
Thermal-aware mapping of streaming applications on 3D Multi-Processor Systems
2013
The 11th IEEE Symposium on Embedded Systems for Real-time Multimedia
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Experiments show a 7% reduction in peak temperature and a 47% reduction in communication energy compared to mappings based on load balancing. ...
While there are some published works on thermal-aware mapping of real-time applications, throughput constraints and data dependencies are mostly not considered. ...
For 2D ICs, a thermal-aware MPSoC assignment and scheduling technique for real-time applications is proposed in [10] , which is based on mixed integer linear programming. ...
doi:10.1109/estimedia.2013.6704498
dblp:conf/estimedia/CoxSKC13
fatcat:kamluzmumjg2zo2m5b7tt5t7hm
Sustainability-Oriented Evaluation and Optimization for MPSoC Task Allocation and Scheduling under Thermal and Energy Variations
2018
IEEE Transactions on Sustainable Computing
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Although various Task Allocation and Scheduling (TAS) heuristics have been proposed to minimize the hotspot time (i.e., duration of thermal emergency) and energy consumption of MPSoC designs, few of them ...
Based on statistical model checking techniques, our approach enables accurate modeling and reasoning of the performance yield of real-time MPSoC designs under joint energy and thermal constraints. ...
In [19] , Huang and Xu proposed novel task allocation and scheduling algorithms to minimize the expected energy consumption of multi-mode embedded systems under performance and lifetime reliability constraints ...
doi:10.1109/tsusc.2017.2723500
dblp:journals/tsusc/ChenZGWZ18
fatcat:amblgvl3o5hi3bwvwdhlpozkqi
Hierarchical Thermal Management Policy for High-Performance 3D Systems With Liquid Cooling
2011
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
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We consider specifically 3D multi-processor systems-on-chips (MPSoCs), realized by stacking silicon CMOS chips and interconnecting them by means of through-silicon vias (TSVs). ...
Then, the on-line control is achieved by policies that are computed off-line by solving an optimization problem that considers the thermal profile of 3D-MPSoCs, its evolution over time and current time-varying ...
Thiele and T. Brunschwiler for their suggestions. ...
doi:10.1109/jetcas.2011.2158272
fatcat:pt4olh4donardmbn3a7aagshpm
High-Performance Energy-Efficient Multicore Embedded Computing
2012
IEEE Transactions on Parallel and Distributed Systems
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Finally, we present design challenges and future research directions for HPEEC system development. ...
Embedded systems differ from traditional high-performance supercomputers in that power is a first-order constraint for embedded systems; whereas, performance is the major benchmark for supercomputers. ...
ACKNOWLEDGMENTS This work was supported by the Natural Sciences and Engineering Research Council of Canada (NSERC) and the US National Science Foundation (NSF) (CNS-0953447 and CNS-0905308). ...
doi:10.1109/tpds.2011.214
fatcat:vagqmojdsjevvc2u2ewqrcjjpq
Multicore enablement for Cyber Physical Systems
2012
2012 International Conference on Embedded Computer Systems (SAMOS)
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such as low(est) power and energy dissipation, reliability, availability and security, real-time and cost constraints, which are typically not found to the same extent in general purpose computing applications ...
This report documents the program and the outcomes of Dagstuhl Seminar 13052 "Multicore Enablement for Embedded and Cyber Physical Systems". ...
maintaining low peak temperatures. ...
doi:10.1109/samos.2012.6404198
dblp:conf/samos/Herkersdorf12
fatcat:73whij7ozbfgpimxz4md3f4jii
Development and validation of Nessie: a multi-criteria performance estimation tool for SoC
2009
2009 Ph.D. Research in Microelectronics and Electronics
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We successively present the modeling of these primitives and the way the solutions are defined and explored based on the power criterion further in Section. ...
For some applications, the systems have to be highly reactive and have strict real time constraints. Others have to support hard environment conditions (high temperature, radiations, ...). ...
selecting a platform block able to execute the elected task and that minimizes the allocation weight. ...
doi:10.1109/rme.2009.5201349
fatcat:lk2x6luvzzfopl24okg723lfhu
Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives
2009
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Index Terms-Energy and power consumption, multiprocessor systems-on-chip (MPSoCs), networks-on-chip (NoCs), on-chip communication. ...
Motivation, problem description, proposed approaches, and open issues are discussed for each problem from system, microarchitecture, and circuit perspectives. ...
., and Dr. P. Bogdan, Dr. S. Garg, and Dr. D. Marculescu of Carnegie Mellon University for the valuable feedback in the early stages of the manuscript. ...
doi:10.1109/tcad.2008.2010691
fatcat:2doy6ne6ybeptgy2avgvzjloji
Energy-Aware High-Performance Computing: Survey of State-of-the-Art Tools, Techniques, and Environments
2019
Scientific Programming
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Optimization goals include various combinations of metrics such as execution time, energy consumption, and temperature with consideration of imposed power limits. ...
We discuss tools and APIs for energy/power management as well as tools and environments for prediction and/or simulation of energy/power consumption in modern HPC systems. ...
CPU (2) Multiprocessor system [44] Task scheduling with thermal consideration for a heterogeneous real-time multiprocessor system-onchip (MPSoC) system [30] Presents a hybrid approach PUPiL (Performance ...
doi:10.1155/2019/8348791
fatcat:ib3dvjzg2bhhjnnklb4kaj2eqi
Dependable embedded systems
2008
2008 6th IEEE International Conference on Industrial Informatics
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This Series addresses current and future challenges pertaining to embedded hardware, software, specifications and techniques. ...
Titles in the Series cover a focused set of embedded topics relating to traditional computing devices as well as hightech appliances used in newer, personal devices, and related topics. ...
Finally, the authors would like to thank all the collaborating projects, persons, and especially all the alumni that were involved in this project for the fruitful discussions and interesting exchanges ...
doi:10.1109/indin.2008.4618103
fatcat:hal6brsgsjg5rlo3u5xil46pxi
High Performance Network-on-Chips (NoCs) Design: Performance Modeling, Routing Algorithm and Architecture Optimization
[article]
2014
arXiv
pre-print
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In this thesis, we have explored the high performance NoC design for MPSoC and CMP structures from the performance modeling in the offline design phase to the routing algorithm and NoC architecture optimization ...
For avoiding temperature hotspots, a thermal-aware routing algorithm is proposed to achieve an even temperature profile for application-specific Network-on-chips (NoCs). ...
Taking all the above information as input, we address the issue of reducing the peak temperature via routing algorithm design. ...
arXiv:1406.3790v1
fatcat:rtr5v3ptu5f37eh3wwxfjusoom
COREnect D3.3. Initial COREnect industry roadmap
[article]
2021
Zenodo
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It involves: Dynamic, real-time multi-tasking. ...
MPSoC design is not currently real-time capable (i.e., it can fulfill hard-real time of ten µsec to few msecs latency). ...
doi:10.5281/zenodo.5075317
fatcat:ww7icphzfjcdjlxbsbo2qekghy
Models of Architecture for DSP Systems
[chapter]
2018
Handbook of Signal Processing Systems
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They most of the time represent the topology of the system in terms of interconnected components and focus on time performance. ...
On the architectural side of digital signal processing system development, heterogeneous systems are becoming ever more complex. ...
Acknowledgements I am grateful to François Berry and Jocelyn Sérot for their valuable advice and support during the writing of this chapter. ...
doi:10.1007/978-3-319-91734-4_30
fatcat:p3a6oyvo2vbv3lx3xl5j6sum3a
Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies
2020
IEEE Access
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The goal of the optimization is to allocate tasks across Multi-Processor SoC (MPSoC) for maximizing the resource utilization and minimizing the processing latency of each task. ...
Therefore, there is a scope for task partitioning into parallel and single-threaded sub-tasks [231] ; whereby a given task is split into two different task types, namely task types suitable for GPU (parallel ...
doi:10.1109/access.2020.3008250
fatcat:kv4znpypqbatfk2m3lpzvzb2nu
SMT-8036 Based Implementation of Secured Software Defined Radio System for Adaptive Modulation Technique
[chapter]
2011
Communications in Computer and Information Science
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DSPs consume less power and can reconfigure for simple real-time tasks but are not able to support computationally intensive tasks. ...
This API measures the loading of the FPGA, DSP and ARM, and reports real-time power data, due to which we can know burst and peak power for a specific data rate, and hence accurately estimate battery life ...
doi:10.1007/978-3-642-22720-2_20
fatcat:efjaizgqdvdbhppaju5fqtltfi
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