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Partial Convolution based Padding
[article]
2018
arXiv
pre-print
Preserved Fulltext
We call it partial convolution based padding, with the intuition that the padded region can be treated as holes and the original input as non-holes. ...
Specifically, during the convolution operation, the convolution results are re-weighted near image borders based on the ratios between the padded area and the convolution sliding window area. ...
ResNet50 with partial convolution based padding vs. zero padding. ...
arXiv:1811.11718v1
fatcat:uxhvl4h2lje4dbjnocfa3f4vci
Context-aware Padding for Semantic Segmentation
[article]
2021
arXiv
pre-print
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Using context-aware padding, the ResNet-based segmentation model achieves higher mean Intersection-Over-Union than the traditional zero padding on the Cityscapes and the dataset of DeepGlobe satellite ...
Zero padding is widely used in convolutional neural networks to prevent the size of feature maps diminishing too fast. However, it has been claimed to disturb the statistics at the border. ...
[18] proposed a distribution padding to maintain the statistics of the border region. Alternatively, Liu et al. [14] proposed a re-weighting based scheme called partial convolution. ...
arXiv:2109.07854v1
fatcat:vtbilcessfdizg4f5msw3yazci
Dealiased convolutions for pseudospectral simulations
2011
Journal of Physics, Conference Series
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Efficient algorithms have recently been developed for calculating dealiased linear convolution sums without the expense of conventional zero-padding or phase-shift techniques. ...
For one-dimensional in-place convolutions, the memory requirements are identical with the zero-padding technique, with the important distinction that the additional work memory need not be contiguous with ...
Implicit zero padding The key idea behind implicitly padding FFT-based convolutions is that the zero-padded input array can be transformed without having to store or process the zero padding [3] . ...
doi:10.1088/1742-6596/318/7/072037
fatcat:hlqtfiuoozbalktmzms5w2rwvy
Automatic generation of specialized direct convolutions for mobile GPUs
2020
Proceedings of the 13th Annual Workshop on General Purpose Processing using Graphics Processing Unit
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Using Lift, we show that it is possible to generate automatically code that is ×10 faster than the direct convolution while using ×3.6 less space than the GEMM-based convolution of the very specialized ...
To reduce effort and reduce time to market, new approaches are needed based on automatic code generation, rather than manual implementation. ...
The amount of padding ρ is determined automatically by a constraint solver and is explained later. Figure 4 presents an overview of the partial convolution algorithm. ...
doi:10.1145/3366428.3380771
dblp:conf/ppopp/MogersRLTOD20
fatcat:342savoeijb3zaznujfmhptoku
Scaling Binarized Neural Networks on Reconfigurable Logic
[article]
2017
arXiv
pre-print
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Finn utilized a novel set of optimizations that enable efficient mapping of BNNs to hardware and implemented fully connected, non-padded convolutional and pooling layers, with per-layer compute resources ...
Based on this technique, we demonstrate numerous experiments to illustrate flexibility and scalability of the approach. ...
PADDING FOR BNN CONVOLUTIONS address falls into the padding region, the padding value (e.g. ...
arXiv:1701.03400v2
fatcat:lf52l3zre5dxndh6wd2xy3v4h4
EcoFlow: Efficient Convolutional Dataflows for Low-Power Neural Network Accelerators
[article]
2022
arXiv
pre-print
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We find that commonly-used low-power CNN inference accelerators based on spatial architectures are not optimized for both of these convolutional kernels. ...
Dilated and transposed convolutions introduce significant zero padding when mapped to the underlying spatial architecture, significantly degrading performance and energy efficiency. ...
The results of these 1D convolutions (or partial sums) are accumulated with other partial sums from other PEs to produce the final ofmap. ...
arXiv:2202.02310v1
fatcat:h5qkp4kqi5gaxhfyo7b4zn3dme
Memory-Efficient CNN Accelerator Based on Interlayer Feature Map Compression
[article]
2021
arXiv
pre-print
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Existing deep convolutional neural networks (CNNs) generate massive interlayer feature data during network inference. ...
The on-chip memory allocation scheme is designed to support dynamic configuration of the feature map buffer size and scratch pad size according to different network-layer requirements. ...
In 3x3 convolution mode, 10 rows and 4 channels partial sums will be sent to the scratch pad each time, where 8 rows are the partial sums of the current RF, and 2 rows are the partial sums of the next ...
arXiv:2110.06155v1
fatcat:xxwaszuurnavxdxrhz3cxiebqy
A Unified Hardware Architecture for Convolutions and Deconvolutions in CNN
[article]
2020
arXiv
pre-print
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In addition, access to on-chip and off-chip memories is optimized to alleviate the burden introduced by partial sum. ...
This unified convolution/deconvolution design is applicable to other CNNs with deconvolution. ...
If a convolution unit is directly reused for deconvolution, it consists of the following two steps: 1) padding the input feature map and 2) applying convolution on the padded feature map, as indicated ...
arXiv:2006.00053v1
fatcat:wdtpt5okdjflln7brfufiutvzi
Binarized Encoder-Decoder Network and Binarized Deconvolution Engine for Semantic Segmentation
2020
IEEE Access
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embedded binary activation considering zero-skipped convolution. ...
The deconvolution used for upsampling in a segmentation network includes zero padding. ...
Convolution is carried out by partial sum aggregations while propagating the input feature maps that are not zero padded to the PE rows where the weights are stored. ...
doi:10.1109/access.2020.3048375
fatcat:kcy6zjhtzzgslmhth367gtephm
Scaling Binarized Neural Networks on Reconfigurable Logic
2017
Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms - PARMA-DITAM '17
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Finn utilized a novel set of optimizations that enable efficient mapping of BNNs to hardware and implemented fully connected, non-padded convolutional and pooling layers, with per-layer compute resources ...
Based on this technique, we demonstrate numerous experiments to illustrate flexibility and scalability of the approach. ...
PADDING FOR BNN CONVOLUTIONS
Padding using nonzero values Zero-padding is commonly applied for convolutional layers in deep neural networks, in order to prevent the pixel information on the image borders ...
doi:10.1145/3029580.3029586
dblp:conf/hipeac/FraserUGBLJV17
fatcat:jliterfdmbbp3ao5yly4masuce
Spatiotemporal Estimation of TROPOMI NO2 Column with Depthwise Partial Convolutional Neural Network
[article]
2022
arXiv
pre-print
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This paper expands the application of a partial convolutional neural network (PCNN) to incorporate depthwise convolution layers, conferring temporal dimensionality to the imputation process. ...
The depthwise convolution process enables the PCNN to independently convolve the data for each channel. ...
We would like to thank Mathias Gruber for reconstructing the partial CNN code for the TensorFlow implementation, which we have updated and modified. ...
arXiv:2204.05917v1
fatcat:f6vmusapgrcwrororaqlsdzpti
Effects of boundary conditions in fully convolutional networks for learning spatio-temporal dynamics
[article]
2021
arXiv
pre-print
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In this paper, several strategies to impose boundary conditions (namely padding, improved spatial context, and explicit encoding of physical boundaries) are investigated in the context of fully convolutional ...
It is then demonstrated that the choice of the optimal padding strategy is directly linked to the data semantics. ...
Neural Network Convolutional Architecture The auto-regressive strategy can be employed to create surrogate models for physics-based quantities. ...
arXiv:2106.11160v3
fatcat:5s5nivwfivfohn3m4ukm3s6b6a
HybridNet: Classification and Reconstruction Cooperation for Semi-supervised Learning
[chapter]
2018
Lecture Notes in Computer Science
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, 3 × 3, same padding 48 × 48 × 128
Convolution
128 filters, 3 × 3, same padding 48 × 48 × 128
Pooling
Maxpool 2 × 2
24 × 24 × 128
Convolution
256 filters, 3 × 3, same padding 24 × 24 × 256
Convolution ...
Dc and Du Encoders Ec and Eu
Inputx
32 × 32 × 3
Convolution
128 filters, 3 × 3, same padding 32 × 32 × 128
Convolution
128 filters, 3 × 3, same padding 32 × 32 × 128
Convolution
128 filters, ...
doi:10.1007/978-3-030-01234-2_10
fatcat:c3feqncthrcyzpzhcad6gxpwie
HybridNet: Classification and Reconstruction Cooperation for Semi-Supervised Learning
[article]
2018
arXiv
pre-print
Preserved Fulltext
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, 3 × 3, same padding 48 × 48 × 128
Convolution
128 filters, 3 × 3, same padding 48 × 48 × 128
Pooling
Maxpool 2 × 2
24 × 24 × 128
Convolution
256 filters, 3 × 3, same padding 24 × 24 × 256
Convolution ...
Dc and Du Encoders Ec and Eu
Inputx
32 × 32 × 3
Convolution
128 filters, 3 × 3, same padding 32 × 32 × 128
Convolution
128 filters, 3 × 3, same padding 32 × 32 × 128
Convolution
128 filters, ...
arXiv:1807.11407v1
fatcat:7owzz5nkybe7xcdknefajik2yi
Arbitrary-Scale Image Synthesis
[article]
2022
arXiv
pre-print
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Moreover, we incorporate novel inter-scale augmentations into our pipeline and partial generation training to facilitate the synthesis of consistent images at arbitrary scales. ...
A recent study called MS-PIE [38] , proposes a padding-free fully-convolutional architecture capable of multi-scale generation based on the input positional encoding and the global latent code. ...
Using p enc (a) as the input to our StyleGAN2-based architecture the resolution of the intermediate feature maps is: n 0 out = n + 2n pad − 2 For the first convolution n l out = n l−1 out * 2 − 4 For each ...
arXiv:2204.02273v1
fatcat:6yxcvw2vhzezfg4xm2tnwqoaza
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