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Parallelism in the front-end

Paramjit S. Oberoi, Gurindar S. Sohi
2003 Proceedings of the 30th annual international symposium on Computer architecture - ISCA '03  
Although the back-ends of superscalar processors have continued to become more parallel, the front-ends remain sequential.  ...  It demonstrates that parallel front-ends are a viable alternative to high-performance sequential front-ends.  ...  This work was supported in part by National Science Foundation grants CCR-9900584 and EIA-0071924, donations from Intel and Sun Microsystems, and the University of Wisconsin Graduate School.  ... 
doi:10.1145/859618.859645 fatcat:w6mfgrwuffcsnpmm4hutok5pea

Parallelism in the front-end

Paramjit S. Oberoi, Gurindar S. Sohi
2003 SIGARCH Computer Architecture News  
Although the back-ends of superscalar processors have continued to become more parallel, the front-ends remain sequential.  ...  It demonstrates that parallel front-ends are a viable alternative to high-performance sequential front-ends.  ...  This work was supported in part by National Science Foundation grants CCR-9900584 and EIA-0071924, donations from Intel and Sun Microsystems, and the University of Wisconsin Graduate School.  ... 
doi:10.1145/871656.859645 fatcat:vl4vrj36hfbtpp6zbgwojotaqm

Parallelism in the front-end

Paramjit S. Oberoi, Gurindar S. Sohi
2003 Proceedings of the 30th annual international symposium on Computer architecture - ISCA '03  
Although the back-ends of superscalar processors have continued to become more parallel, the front-ends remain sequential.  ...  It demonstrates that parallel front-ends are a viable alternative to high-performance sequential front-ends.  ...  This work was supported in part by National Science Foundation grants CCR-9900584 and EIA-0071924, donations from Intel and Sun Microsystems, and the University of Wisconsin Graduate School.  ... 
doi:10.1145/859644.859645 fatcat:apr43iwiyrcjdaax66rz6zjdc4

THD Reduction in Wind Energy System Using Type-4 Wind Turbine/PMSG Applying the Active Front-End Converter Parallel Operation

Nadia Maria Salgado-Herrera, David Campos-Gaona, Olimpo Anaya-Lara, Aurelio Medina-Rios, Roberto Tapia-Sánchez, Juan Ramon Rodríguez-Rodríguez
2018 Energies  
In this paper, the active front-end (AFE) converter topology for the total harmonic distortion (THD) reduction in a wind energy system (WES) is used.  ...  converter (VSC) to use pVSC connected in parallel, the AFE converter is generated.  ...  Acknowledgments: This work was supported in part by The National Council of Science and Technology (CONACYT) in Mexico, through the Scholarship awarded under the Called "Estancias Posdoctorales Vinculadas  ... 
doi:10.3390/en11092458 fatcat:wdgbcu3drrcw3fcwt3u7xggfwq

Parallelism in the front-end

P.S. Oberoi, G.S. Sohi
30th Annual International Symposium on Computer Architecture, 2003. Proceedings.  
Although the back-ends of superscalar processors have continued to become more parallel, the front-ends remain sequential.  ...  It demonstrates that parallel front-ends are a viable alternative to high-performance sequential front-ends.  ...  This work was supported in part by National Science Foundation grants CCR-9900584 and EIA-0071924, donations from Intel and Sun Microsystems, and the University of Wisconsin Graduate School.  ... 
doi:10.1109/isca.2003.1207003 dblp:conf/isca/OberoiS03 fatcat:stfgfremdfbljhbuom2rqas6sy

Unified analytical expressions for calculating resonant frequencies, transimpedances, and equivalent input noise current densities of tuned receiver front ends

Qing Zhong Liu
1992 IEEE transactions on microwave theory and techniques  
The expressions can be used to investigate the performances of different tuned front ends in a very simple way and provide a good starting point for further computer optimizations of the front ends. 2  ...  front ends built with FET's and p-i-n diodes.  ...  H~g d a h l from the Electromagnetics Institute, Technical University of Denmark, for providing the model for calculating the equivalent input noise current density of the front ends in Touchstone, and  ... 
doi:10.1109/22.120106 fatcat:lbm6dazrfbas5enedqo3ftgbke

Design Considerations for Parallel Differential Power Processing Converters in a Photovoltaic-Powered Wearable Application

Hyunji Lee, Katherine Kim
2018 Energies  
Two parallel DPP configurations, with and without a front-end converter, are analyzed and compared for a target battery-charging application.  ...  The DPP system without a front-end converter shows consistently high performance and operates properly over a wider range of lighting conditions.  ...  The parallel DPP system without a front-end converter is shown in Figure 3a and the system with a front-end converter is shown in Figure 3b .  ... 
doi:10.3390/en11123329 fatcat:pa5lstv6avf7zcahkam74npuaq

IEEE industry application society

2016 2016 IEEE Industry Applications Society Annual Meeting  
During the normal motoring operation of such systems, the proper load sharing of input converters must also be ensured, not to cause any device failures or nuisance tripping by exceeding the front end  ...  However, as the number of parallel drives increases it is difficult to select the proper device ratings by testing.  ...  In this study the parallel operation of a 7.5 HP and a 125 HP drives with diode front ends, and a 7.5HP diode front end drive with a 125HP SCR front end drive, are analyzed. 3.0 PARALLEL OPERATION OF 7.5  ... 
doi:10.1109/ias.2016.7731982 fatcat:ijwq6jqw3bdjnanvd7vcbrasde

A universal parallel front-end for execution driven microarchitecture simulation

Chad D. Kersey, Arun Rodrigues, Sudhakar Yalamanchili
2012 Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation Methods and Tools - RAPIDO '12  
In this paper we introduce the current incarnation of QSim, a universal front-end for execution driven multicore microarchitecture simulators.  ...  Execution driven microarchitecture simulators tend to devote a large portion of their source code to a front-end that performs instruction set level functional simulation, providing the decoded instruction  ...  ACKNOWLEDGMENTS The authors are grateful to Paolo Faraboschi and Daniel Ortega for their suggestions and guidance in getting QSim started.  ... 
doi:10.1145/2162131.2162135 dblp:conf/rapido/KerseyRY12 fatcat:eko4sav3v5ehralekfht2w736i

MRNet

Philip C. Roth, Dorian C. Arnold, Barton P. Miller
2003 Proceedings of the 2003 ACM/IEEE conference on Supercomputing - SC '03  
We evaluated MRNet in a simple test tool and also integrated into an existing, real-world performance tool with up to 512 tool back-ends.  ...  In our experiments, the MRNet-based tools showed significantly better performance than the tools without MRNet for average message latency and throughput, overall tool start-up latency, and performance  ...  Acknowledgments This paper benefited from the hard work of many past and present members of the Paradyn research group.  ... 
doi:10.1145/1048935.1050172 dblp:conf/sc/RothAM03 fatcat:42wsgm2hrbdk3ayhnmazcdjjh4

Asynchronous checkpoint migration with MRNet in the Scalable Checkpoint / Restart Library

Kathryn Mohror, Adam Moody, Bronis R. de Supinski
2012 IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN 2012)  
Applications running on today's supercomputers tolerate failures by periodically saving their state in checkpoint files on stable storage, such as a parallel file system.  ...  We employ MRNet, a tree-based overlay network library, to transfer checkpoints from the compute nodes to the parallel file system asynchronously.  ...  Accordingly, the United States Government retains and the publisher, by accepting the article for publication, acknowledges that the United States Government retains a a non-exclusive, paid-up, irrevocable  ... 
doi:10.1109/dsnw.2012.6264668 dblp:conf/dsn/MohrorMS12 fatcat:u5p7xpcilbeopl7wcyx6v5wbke

Emulation in FPGA of G-Link Chip-set of Tile Calorimeter Electronic System

José Alves, José Silva, Guiomar Evans, José Soares Augusto
2014 Procedia Technology - Elsevier  
In the back-end is implemented the G-link receiver, the HDMP-1034, which is used to receive and deserialize the data sent by a G-Link transmitter, the HDMP-1032 in the front-end.  ...  The ATLAS Tile Calorimeter front-end and the back-end electronics use the Agilent HDMP-1032/1034 Transmitter/Receiver chip-set as physical layer.  ...  by the front-end electronics.  ... 
doi:10.1016/j.protcy.2014.10.242 fatcat:h5t43eyxpnaelhrehgdncs5sey

Partitioning tasks between a pair of interconnected heterogeneous processors: A case study

David J. Lilja
1995 Concurrency Practice and Experience  
Experiments with a Connection Machine CM-200 demonstrate how to apply this model to partition two different application programs across the sequential front-end processor and the parallel back-end array  ...  In fact, one type of architecture may be well suited to executing one section of a program while another architecture may be better suited to executing another section of the same program.  ...  across the heterogeneous Sun-4 front-end and the CM-200 parallel back-end array used the maximum subvector problem [3] .  ... 
doi:10.1002/cpe.4330070304 fatcat:e56d5qvyo5erllkqiqknb46vy4

Neuromorphic processor for real-time biosonar object detection

Gert Cauwenberghs, R. Timothy Edwards, Yunbin Deng, Roman Genov, David Lemonds
2002 IEEE International Conference on Acoustics Speech and Signal Processing  
Based on analog programmable components, the front-end can be configured as a parallel or cascaded bandpass filterbank of up to 34 channels spanning the 10 to 150 kHz range.  ...  The classifier is implemented with the Kerneltron, a massively parallel mixed-signal Support Vector "Machine" in silicon delivering a throughput in excess of a trillion (½¼ ½¾ ) multiplyaccumulates per  ...  Both can be redressed in a dedicated VLSI version of the front-end [12] .  ... 
doi:10.1109/icassp.2002.5745530 dblp:conf/icassp/CauwenberghsEDGL02 fatcat:vsugx6kkz5ghjic42t6qclh6pi

Neuromorphic processor for real-time biosonar object detection

Cauwenberghs, Edwards, Yunbin Deng, Genov, Lemonds
2002 IIEEE International Conference on Acoustics Speech and Signal Processing  
Based on analog programmable components, the front-end can be configured as a parallel or cascaded bandpass filterbank of up to 34 channels spanning the 10 to 150 kHz range.  ...  The classifier is implemented with the Kerneltron, a massively parallel mixed-signal Support Vector "Machine" in silicon delivering a throughput in excess of a trillion (½¼ ½¾ ) multiplyaccumulates per  ...  Both can be redressed in a dedicated VLSI version of the front-end [12] .  ... 
doi:10.1109/icassp.2002.1004791 fatcat:aiv7tui2xzdrndrnh4rj6wpfuu
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