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Page 148 of Journal of Research and Practice in Information Technology Vol. 28, Issue 4 [page]

1996 Journal of Research and Practice in Information Technology  
., and RUDOLPH, L. (1986a): Parallel Prefix on Fully Connected Direct Connection Machines, in Proc. Int. Conf. on Parallel Processing, 278-284.  ...  ., and SNIR, M. (1985): The Power of Parallel Prefix, JEEE Trans. on Comput., C-34, 965-968.  ... 

Implementing the push-relabel method for the maximum flow problem on a connection machine [chapter]

Farid Alizadeh, Andrew Goldberg
1993 DIMACS Series in Discrete Mathematics and Theoretical Computer Science  
Acknowledgment We would like to thank the Thinking Machine Corporation and the Army High Performance Computing Research Center at the University of Minnesota for making their Connection Machines available  ...  This mapping is designed to take advantage of the parallel prefix and suffix operations provided in the Connection Machine.  ...  Then, we describe a set of useful operations available on the Connection Machine for accumulating in parallel partial sums, partial nnnimums, etc. Connection Machine Architecture.  ... 
doi:10.1090/dimacs/012/04 dblp:conf/dimacs/AlizadethG91 fatcat:2shq2tpb55d77j2ce63judrdpy

MIT SuperCloud portal workspace: Enabling HPC web application deployment

Andrew Prout, William Arcand, David Bestor, Bill Bergeron, Chansup Byun, Vijay Gadepally, Matthew Hubbell, Michael Houle, Michael Jones, Peter Michaleas, Lauren Milechin, Julie Mullen (+4 others)
2017 2017 IEEE High Performance Extreme Computing Conference (HPEC)  
Performance measurements indicate that the MIT SuperCloud Portal Workspace incurs marginal overhead when compared to a direct connection of the same service.  ...  The MIT SuperCloud Portal Workspace enables the secure exposure of web services running on high performance computing (HPC) systems.  ...  MIT SuperCloud Virtal Machine System The MIT SuperCloud Virtual Machine (VM) system [Reuther 2012] allows for the creation of virtual machines that are launched as jobs on the HPC cluster.  ... 
doi:10.1109/hpec.2017.8091097 dblp:conf/hpec/ProutABBBGHHJMM17 fatcat:zsabgoojobdu3d6xurbwx4u7ma

Efficient Addition on Field Programmable Gate Arrays [chapter]

Andreas Jakoby, Christian Schindelhauer
2001 Lecture Notes in Computer Science  
Finally, these results are generalized to the class of prefix functions.  ...  The parameter describes the degree of connectivity of the underlying hardware. This model covers among others two-dimensional cellular automata for and VLSI-circuits for .  ...  Unlike for machine models like Turing machines or directed acyclic circuits it is not clear which notion of time for computation is most important for FPGAs.  ... 
doi:10.1007/3-540-45294-x_19 fatcat:5mli7q52sje4rfnbbmyi4bq42m

Parallel computation with the spectral element method [chapter]

Hong Ma
1996 Parallel Computational Fluid Dynamics 1995  
Spectral element models for the shallow water equations and the Navier-Stokes equations have been successfully implemented on a data parallel supercomputer, the Connection Machine model CM-5.  ...  The nonstaggered grid formulations for both models are described, which are shown to be especially efficient in data parallel computing environment.  ...  On the Connection Machine model CM-5, we pursue data parallelism by designing the layout of the arrays of the spectral element model in such a way that the axes along the number of elements are assigned  ... 
doi:10.1016/b978-044482322-9/50084-0 fatcat:ti3xtqn6ebc6rejue7xrlqlq6e

Machine and Collection Abstractions for User-Implemented Data-Parallel Programming

Magne Haveraaen
2000 Scientific Programming  
In data parallelism data structures, typically collection classes in the form of large arrays, are distributed on the processors of the target parallel machine.  ...  Here we propose a framework with two conceptual classes, Machine and Collection. The Machine class abstracts hardware communication and distribution properties.  ...  Acknowledgements We would like to thank the following people for their contributions to this work: Ivar Velle, Steinar Søreide, who did most of the parallel implementations and helped with an earlier draft  ... 
doi:10.1155/2000/485607 fatcat:j63bynfbrnedfcv4s5izm2mvfu

Parallel Computation of Component Trees on Distributed Memory Machines

Markus Gotz, Gabriele Cavallaro, Thierry Geraud, Matthias Book, Morris Riedel
2018 IEEE Transactions on Parallel and Distributed Systems  
connected filters.  ...  This work proposes a new efficient hybrid algorithm for the parallel computation of two particular component trees-the max-and min-tree-in shared and distributed memory environments.  ...  ; rules; MinÞ 16: Right-Prefix-SumðReverseðendsÞ; rules; MinÞ 17: 18: return rules G € OTZ ET AL.: PARALLEL COMPUTATION OF COMPONENT TREES ON DISTRIBUTED MEMORY MACHINES merging these chains across all  ... 
doi:10.1109/tpds.2018.2829724 fatcat:mvb4yiv47rgwrbz5r5g53x6r4y

Principles of Distributed Test Synthesis Based on True-Concurrency Models [chapter]

Claude Jard
2002 IFIP Advances in Information and Communication Technology  
Konig, we propose to use a trueconcurrency model based on graph unfolding.  ...  We base our work on our experience in using model-checking techniques, as successfully implemented in the TGV tool. Continuing the works of A. Ulrich and H.  ...  In [22] , the unfolding of "behaviour machines" is used to propose a "partial order transition cover" as a general heuristics to select partial order test cases, which could be later projected on parallel  ... 
doi:10.1007/978-0-387-35497-2_22 fatcat:v3z33hebavfxrie44wkgcaep2q

Architecture and applications of the Connection Machine

L.W. Tucker, G.G. Robertson
1988 Computer  
Large programs have tens of thousands of instructions operat-26 Thinking Machines Corp.  ...  The second approach exploits the parallelism inherent in many problems.  ...  This direct backplane connection allows the frame buffer to receive data from the Connection Machine processors at rates up to one gigabit per second. Graphics display.  ... 
doi:10.1109/2.74 fatcat:zog5vvidhba3rn6p2tsco52o54

AN ASSESSMENT OF THE CONNECTION MACHINE

ROBERT SCHREIBER
1993 International journal of high speed computing  
The CM-2 is an example of a connection machine. The strengths and problems of this implementation are considered.  ...  Then important issues in the architecture and programming environment of connection machines in general are considered.  ...  (the CM-2) of the idea] connection machine.  ... 
doi:10.1142/s0129053393000220 fatcat:simo6to2hnamhec4itephqirvm

Towards Learning Convolutions from Scratch [article]

Behnam Neyshabur
2020 arXiv   pre-print
with local connections and achieves state-of-the-art accuracies for training fully-connected nets on CIFAR-10 (85.19 bridging the gap between fully-connected and convolutional nets.  ...  To find architectures with small description length, we propose β-LASSO, a simple variant of LASSO algorithm that, when applied on fully-connected networks for image classification tasks, learns architectures  ...  Acknowledgement We thank Sanjeev Arora, Ethan Dyer, Guy Gur-Ari, Aitor Lewkowycz and Yuhuai Wu for many fruitful discussions and Vaishnavh Nagarajan and Vinay Ramasesh for their useful comments on this  ... 
arXiv:2007.13657v1 fatcat:kkkqf3vigrfxhabsagr7oxe5wq

A PRAM-NUMA model of computation for addressing low-TLP workloads

Martti Forsell
2010 2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW)  
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy parallel programmability  ...  This implementation relies on exploitation of the slack of parallel applications to hide the latency of the memory system instead of caches, sufficient bisection bandwidth to guarantee high throughput,  ...  Finally, it allows one to apply parallel programming techniques from fully asynchronous coarse grained threads (processors in the PRAM-NUMA model terminology) down to synchronous threads interchanging  ... 
doi:10.1109/ipdpsw.2010.5470846 dblp:conf/ipps/Forsell10 fatcat:52xppk5frzbbdh7kwrcspknlrq

A PRAM-NUMA Model of Computation for Addressing Low-TLP Workloads

Martti Forsell
2011 International Journal of Networking and Computing  
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy parallel programmability  ...  This implementation relies on exploitation of the slack of parallel applications to hide the latency of the memory system instead of caches, sufficient bisection bandwidth to guarantee high throughput,  ...  Finally, it allows one to apply parallel programming techniques from fully asynchronous coarse grained threads (processors in the PRAM-NUMA model terminology) down to synchronous threads interchanging  ... 
doi:10.15803/ijnc.1.1_21 fatcat:kl3qyj2airbcvbuq42fsdarqde

A Reconfigurable Multi-core Computing Platform for Robotics and e-Health Applications

D. Majoe, L. Widmer, Liu Ling, J. C-C Kao, J. Gutknecht
2012 2012 IEEE/ACIS 11th International Conference on Computer and Information Science  
The first is multi-core processing on FPGA devices in which the multi-core architecture allows software to map application-level parallelism to inherent parallel fabric to offer better performance, the  ...  However in [7] , the size of the cores and the prefixed interconnect architecture (the shared memory) limits the parallelism that can be mapped into the hardware.  ...  Although the machine learning, goal direction and classification cells are still under construction, the basic architecture has been shown to operate well using dummy cells.  ... 
doi:10.1109/icis.2012.12 dblp:conf/ACISicis/MajoeWLKG12 fatcat:wt2webne6bdqlmzqjc6trevl6y

Parallel digital halftoning by error-diffusion

Panagiotis Takis Metaxas
2003 Proceedings of the Paris C. Kanellakis memorial workshop on Principles of computing & knowledge Paris C. Kanellakis memorial workshop on the occasion of his 50th birthday - PCK50  
In this paper we present and analyze a simple, yet optimal, error-diffusion parallel algorithm for digital halftoning and we discuss an implementation on a parallel machine.  ...  In particular, we describe implementations on data-parallel computers that contain linear arrays and two-dimensional meshes of processing elements.  ...  Parallel computers often have direct parallel I/O subsystems equipped with disk arrays that facilitate this step. Our machine was not equipped with such a subsystem, though.  ... 
doi:10.1145/778348.778355 fatcat:iwdjj7z7ondgzeglq2ujwdgddu
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