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PTRAM: A Parallel Topology-and Routing-Aware Mapping Framework for Large-Scale HPC Systems

Seyed H. Mirsadeghi, Ahmad Afsahi
2016 2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)  
With the rapid increase in the size and scale of modern systems, topology-aware process mapping has become an important approach for improving system efficiency.  ...  We also use the underlying routing information in addition to the topology of the system to derive a better evaluation of congestion.  ...  We believe parallelism is the key for having a truly scalable topology-aware mapping approach in current and future HPC systems.  ... 
doi:10.1109/ipdpsw.2016.146 dblp:conf/ipps/MirsadeghiA16 fatcat:ntncfmpel5htrng6jwfxhymyza