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Optimizing consistency checking for memory-intensive transactions

Justin Emile Gottschlich, Daniel A. Connors
2008 Proceedings of the twenty-seventh ACM symposium on Principles of distributed computing - PODC '08  
We present a unique invalidation algorithm which boasts high transactional throughput for memory-intensive transactions.  ...  Consistency checking, the way memory conflicts are found in TM, is critical to performance and is executed through either validation or invalidation.  ...  CONSISTENCY CHECKING Validation ensures consistency by comparing transactions' read and write sets against global memory using versioning of memory to verify consistency [1] .  ... 
doi:10.1145/1400751.1400848 dblp:conf/podc/GottschlichC08 fatcat:npr2qqftmfdp7n5urt6nptvyq4

Cicada

Hyeontaek Lim, Michael Kaminsky, David G. Andersen
2017 Proceedings of the 2017 ACM International Conference on Management of Data - SIGMOD '17  
Multi-core in-memory databases promise high-speed online transaction processing.  ...  Cicada is a single-node multi-core in-memory transactional database with serializability.  ...  No-precheck skips the early version consistency check. By omitting any single optimization, Cicada achieves 4.9-13.2% lower throughput.  ... 
doi:10.1145/3035918.3064015 dblp:conf/sigmod/LimKA17 fatcat:ikod5evn2bcvbmlllwih2354me

An efficient software transactional memory using commit-time invalidation

Justin E. Gottschlich, Manish Vachharajani, Jeremy G. Siek
2010 Proceedings of the 8th annual IEEE/ ACM international symposium on Code generation and optimization - CGO '10  
Commit-time invalidation also requires notably fewer operations than commit-time validation for memory-intensive transactions, uses zero commit-time operations for dynamically detected read-only transactions  ...  To improve the performance of transactional memory (TM), researchers have found many eager and lazy optimizations for conflict detection, the process of determining if transactions can commit.  ...  Spear for his early support of our initial design. We are also grateful to Michael for the discussions we had with him that helped us arrive at our final design.  ... 
doi:10.1145/1772954.1772970 dblp:conf/cgo/GottschlichVS10 fatcat:42lh56cuzvhafkr6a73bjwacem

Remote Invalidation: Optimizing the Critical Path of Memory Transactions

Ahmed Hassan, Roberto Palmieri, Binoy Ravindran
2014 2014 IEEE 28th International Parallel and Distributed Processing Symposium  
Software Transactional Memory (STM) systems are increasingly emerging as a promising alternative to traditional locking algorithms for implementing generic concurrent applications.  ...  RInval's main idea is to execute commit and invalidation routines on remote server threads that run on dedicated cores, and use cachealigned communication between application's transactional threads and  ...  However, for an STM algorithm to be generic, the memory-level locks that transactions acquire cannot be as optimal as those for application-specific implementations.  ... 
doi:10.1109/ipdps.2014.30 dblp:conf/ipps/HassanPR14 fatcat:5ktpma6teffkjdmwdb2phc7jsq

A Comparative Study Of Main Memory Databases And Disk-Resident Databases

F. Raja, M.Rahgozar, N. Razavi, M. Siadaty
2008 Zenodo  
Conventional database systems are optimized for the particular characteristics of disk storage mechanisms.  ...  Memory resident systems, on the other hand, use different optimizations to structure and organize data, as well as to make it reliable.  ...  ACKNOWLEDGMENT We would like to thank Konstatin Knizhnik for providing the latest version of FastDB online and for his e-mail support and help with development of FastDB applications.  ... 
doi:10.5281/zenodo.1061326 fatcat:ia7pdq5blfevbesydc2ejyhmui

Concurrent and consistent virtual machine introspection with hardware transactional memory

Yutao Liu, Yubin Xia, Haibing Guan, Binyu Zang, Haibo Chen
2014 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)  
In this paper, we propose a novel approach, called TxIntro, which retrofits hardware transactional memory (HTM) for concurrent, timely and consistent introspection of guest VMs.  ...  We have implemented and evaluated TxIntro based on Xen VMM on a commodity Intel Haswell machine that provides restricted transactional memory (RTM) support.  ...  Acknowledgement We thank Sylvain Geneves and the anonymous reviewers for their insightful comments.  ... 
doi:10.1109/hpca.2014.6835951 dblp:conf/hpca/LiuXGZC14 fatcat:wcai2c5ytjajnmzjb3jsciy7wa

On Developing Optimistic Transactional Lazy Set [chapter]

Ahmed Hassan, Roberto Palmieri, Binoy Ravindran
2014 Lecture Notes in Computer Science  
Although Software Transactional Memory (STM) is a promising technology for designing and implementing transactional applications, STM-based transactional data structures still perform inferior to their  ...  optimized, concurrent (i.e. non-transactional) counterparts.  ...  per transaction), read-intensive (20% writes and 1 operation per transaction), write-intensive (80% writes and 1 operation per transaction), and high contention (80% writes and 5 operations per transaction  ... 
doi:10.1007/978-3-319-14472-6_29 fatcat:2bwtutsek5hx3au2n43dnlffsq

An Evaluation of Strict Timestamp Ordering Concurrency Control for Main-Memory Database Systems [chapter]

Stephan Wolf, Henrik Mühe, Alfons Kemper, Thomas Neumann
2015 Lecture Notes in Computer Science  
Although these techniques allow for unprecedentedly high throughput for suitable workloads, their throughput quickly diminishes once unsuitable transactions, for instance those crossing partition borders  ...  Thus, new methods to execute transactions in a serial, lock-free mode have been investigated and successfully employed, for instance in H-Store or HyPer.  ...  This design has two advantages compared to a separate delete flag and dirty bit: • As the write timestamp has to be checked anyway, the check for the dirty bit does not require an additional memory operation  ... 
doi:10.1007/978-3-319-13960-9_7 fatcat:njphpfyeafb67ilehjrnmeiuba

Skeena: Efficient and Consistent Cross-Engine Transactions [article]

Jianqiu Zhang, Kaisong Huang, Tianzheng Wang, King Lv
2021 arXiv   pre-print
In particular, a memory-optimized engine and a conventional storage-centric engine may coexist for various application needs.  ...  This paper describes Skeena, a holistic approach to cross-engine transactions.  ...  This is non-negligible for read-intensive workloads, which themselves are already very lightweight in a main-memory environment.  ... 
arXiv:2108.00632v1 fatcat:xhra56fygrc3vcd63v6q546dqm

Data management with SAPs in-memory computing engine

Joos-Hendrik Boese, Cafer Tosun, Christian Mathis, Franz Faerber
2012 Proceedings of the 15th International Conference on Extending Database Technology - EDBT '12  
While in common three-tier architectures, compute-intensive applications run at the application server layer and data is loaded into the main memory of application servers, enterprise applications developed  ...  In conventional system landscapes currently found in enterprises, dedicated systems are used for analytical and transactional data processing.  ...  ., adjustable time buckets) and avoids maintenance and consistency checks against persistent aggregates. • Analytics of patient's records in cancer treatment: documentation of diagnosis and therapies of  ... 
doi:10.1145/2247596.2247661 dblp:conf/edbt/BoeseTMF12 fatcat:bzwwv5nbz5e2diyt4fcur6queu

An empirical evaluation of in-memory multi-version concurrency control

Yingjun Wu, Joy Arulraj, Jiexi Lin, Ran Xian, Andrew Pavlo
2017 Proceedings of the VLDB Endowment  
The year attribute for each system (except for Oracle) is when it was first released or announced. For Oracle, it is the first year the system included MVCC.  ...  Multi-version concurrency control (MVCC) is currently the most popular transaction management scheme in modern database management systems (DBMSs).  ...  We also thank Tianzheng Wang for his feedback.  ... 
doi:10.14778/3067421.3067427 fatcat:wjkgp5adanakxhxgjtxkvbhy4q

View-Oriented Transactional Memory

K. Leung, Z. Huang
2011 2011 40th International Conference on Parallel Processing Workshops  
This paper proposes a View-Oriented Transactional Memory (VOTM) model to seamlessly integrate different concurrency control methods including locking mechanism and transactional memory.  ...  The RAC scheme has the merits of both the locking mechanism and the transactional memory.  ...  Once the location is read, it is checked if it can be used to construct a consistent snapshot.  ... 
doi:10.1109/icppw.2011.10 dblp:conf/icppw/LeungH11 fatcat:4ocvh7akzzhtbn7g3xhtymezei

HAFT

Dmitrii Kuvaiskii, Rasha Faqeh, Pramod Bhatotia, Pascal Felber, Christof Fetzer
2016 Proceedings of the Eleventh European Conference on Computer Systems - EuroSys '16  
HAFT utilizes instruction-level redundancy for fault detection and hardware transactional memory for fault recovery. We evaluated HAFT with Phoenix and PARSEC benchmarks.  ...  We thank Norman Rink for his help with the LLVM compiler backend.  ...  We also thank Manos Kapritsos, Sergei Arnautov, Maksym Planeta, our anonymous reviewers, and our shepherd Andreas Haeberlen for their helpful comments.  ... 
doi:10.1145/2901318.2901339 dblp:conf/eurosys/KuvaiskiiFBFF16 fatcat:rvirzztinzcgpoi52iiy7dclnq

Parallel data mining for association rules on shared-memory multi-processors

M. J. Zaki, M. Ogihara, S. Parthasarathy, W. Li
1996 Proceedings of the 1996 ACM/IEEE conference on Supercomputing (CDROM) - Supercomputing '96  
We further present a set of optimizations for the sequential and parallel algorithms. Experiments show that a significant improvement of performance is achieved using our proposed optimizations.  ...  In this paper we present parallel algorithms for data mining of association rules, and study the degree of parallelism, synchronization, and data locality issues on the SGI Power Challenge shared-memory  ...  This approach can however consume a lot of memory. Short-circuited Subset Checking For a given fan-out F, for iteration k, we need additional memory of size F k to store the flags.  ... 
doi:10.1145/369028.369117 fatcat:btlu2rzpobhmflrkyl6ryzwk7e

Compiling and Optimizing Java 8 Programs for GPU Execution

Kazuaki Ishizaki, Akihiro Hayashi, Gita Koblents, Vivek Sarkar
2015 2015 International Conference on Parallel Architecture and Compilation (PACT)  
Additionally, our optimization techniques 1) allocate and align the starting address of the Java array body in the GPUs with the memory transaction boundary to increase memory bandwidth, 2) utilize read-only  ...  The compiler also performs loop versioning for eliminating redundant exception checks and for supporting virtual method invocations within GPU kernels.  ...  We thank Marcel Mitran for his encouragement and support in pursuing the parallel streams API and lambda approach, and thank Jimmy Kwa for his extensive contribution to the implementation.  ... 
doi:10.1109/pact.2015.46 dblp:conf/IEEEpact/IshizakiHKS15 fatcat:c6bwzxy7vbbg5mbo6ohajgmepa
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