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Optimal voltage allocation techniques for dynamically variable voltage processors

Woo-Cheol Kwon, Taewhan Kim
2005 ACM Transactions on Embedded Computing Systems  
This paper presents a set of new important results for the problem of task scheduling and voltage allocation in dynamically variable voltage processor for minimizing the total processor energy consumption  ...  The contributions are two folds: (1) For given multiple discrete supply voltages and tasks with arbitrary arrival-time/deadline constraints, we propose a voltage allocation technique which produces a feasible  ...  allocation for low power in variable voltage processor.  ... 
doi:10.1145/1053271.1053280 fatcat:bvfuh5meonc6hexwvgah3f2smu

Optimal voltage allocation techniques for dynamically variable voltage processors

Woo-Cheol Kwon, Taewhan Kim
2003 Proceedings of the 40th conference on Design automation - DAC '03  
This paper presents a set of new important results for the problem of task scheduling and voltage allocation in dynamically variable voltage processor for minimizing the total processor energy consumption  ...  The contributions are two folds: (1) For given multiple discrete supply voltages and tasks with arbitrary arrival-time/deadline constraints, we propose a voltage allocation technique which produces a feasible  ...  allocation for low power in variable voltage processor.  ... 
doi:10.1145/775865.775867 fatcat:sozdu2i62jeutcxfak77jfma3y

Optimal voltage allocation techniques for dynamically variable voltage processors

Woo-Cheol Kwon, Taewhan Kim
2003 Proceedings of the 40th conference on Design automation - DAC '03  
This paper presents a set of new important results for the problem of task scheduling and voltage allocation in dynamically variable voltage processor for minimizing the total processor energy consumption  ...  The contributions are two folds: (1) For given multiple discrete supply voltages and tasks with arbitrary arrival-time/deadline constraints, we propose a voltage allocation technique which produces a feasible  ...  allocation for low power in variable voltage processor.  ... 
doi:10.1145/775832.775867 dblp:conf/dac/KwonK03 fatcat:byuif3kocvchrebsmx6rl6e7d4

Optimal voltage allocation techniques for dynamically variable voltage processors

Woo-Cheol Kwon, Taewhan Kim
Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)  
This paper presents a set of new important results for the problem of task scheduling and voltage allocation in dynamically variable voltage processor for minimizing the total processor energy consumption  ...  The contributions are two folds: (1) For given multiple discrete supply voltages and tasks with arbitrary arrival-time/deadline constraints, we propose a voltage allocation technique which produces a feasible  ...  allocation for low power in variable voltage processor.  ... 
doi:10.1109/dac.2003.1218855 fatcat:z26ihcd2x5fsxnmdouthc5sdxu

Power optimization of variable-voltage core-based systems

I. Hong, D. Kirovski, Gang Qu, M. Potkonjak, M.B. Srivastava
1999 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
Our synthesis technique also addresses the selection of the processor core and the determination of the instruction and data cache size and configuration so as to fully exploit dynamically variable voltage  ...  We develop the design methodology for the low power core-based real-time system-onchip based on dynamically variable voltage hardware.  ...  The variable voltage processor core can be made to operate at different optimal points along its power vs. speed curve in order to achieve much higher energy efficiency than existing techniques for a wider  ... 
doi:10.1109/43.811318 fatcat:pytkpcwxgzgtdko5a5phphpog4

Power optimization of variable voltage core-based systems

Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkonjak, Mani B. Srivastava
1998 Proceedings of the 35th annual conference on Design automation conference - DAC '98  
Our synthesis technique also addresses the selection of the processor core and the determination of the instruction and data cache size and configuration so as to fully exploit dynamically variable voltage  ...  We develop the design methodology for the low power core-based real-time system-onchip based on dynamically variable voltage hardware.  ...  The variable voltage processor core can be made to operate at different optimal points along its power vs. speed curve in order to achieve much higher energy efficiency than existing techniques for a wider  ... 
doi:10.1145/277044.277088 dblp:conf/dac/HongKQPS98 fatcat:v7qtdzf7jrewjfpjkeqi5ngrpe

A Cooperative, Accurate Solving Framework for Optimal Allocation, Scheduling and Frequency Selection on Energy-Efficient MPSoCs

Martino Ruggiero, Pari Gioia, Guerri Alessio, Luca Benini, Milano Michela, Davide Bertozzi, Alexandru Andrei
2006 2006 International Symposium on System-on-Chip  
We propose a novel methodology to formulate and solve to optimality the allocation, scheduling and discrete voltage selection problem for variable voltage/frequency MPSoCs, minimizing the system energy  ...  Most problems addressed by the software optimization flow for multi-processor systems-on-chip (MPSoCs) are NP-complete, and have been traditionally tackled by means of heuristics and highlevel approximations  ...  A number of techniques have been developed for single processor systems. Yao et al. proposed in [12] the first DVS approach which can dynamically change the supply voltage over a continuous range.  ... 
doi:10.1109/issoc.2006.321997 dblp:conf/issoc/RuggieroGABMBA06 fatcat:hqzdauzlhfgolp6qmv3lqzbfoe

Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems

L. Yan, Jiong Luo, N.K. Jha
2005 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
DVS is a powerful technique for reducing dynamic power consumption quadratically.  ...  We first derive an energy consumption model to determine the optimal supply voltage and body bias voltage under a given clock frequency.  ...  Based on the above discussions, for a single processor, optimal slack allocation can be achieved as follows.  ... 
doi:10.1109/tcad.2005.850895 fatcat:3t2lbqw3qbd43jgyk3qqokkwkm

Energy-aware instruction-set customization for real-time embedded multiprocessor systems

Seungrok Jung, Jungsoo Kim, Sangkwon Na, Chong-Min Kyung
2009 Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design - ISLPED '09  
This paper presents a method to customize instruction-set for configurable multiprocessors under a given silicon area budget so that total dynamic energy consumption is minimized when dynamic voltage and  ...  The proposed method is based on Mixed-Integer Linear Programming (MILP) to select the optimal processor configurations for real-time tasks from custom instruction candidates.  ...  Our goal is to find the optimal configuration for each 7) is a binary decision variable of the k th configuration in the i th task.  ... 
doi:10.1145/1594233.1594316 dblp:conf/islped/JungKNK09 fatcat:ovaj6n4umrg7zafahmuyd46gr4

Energy efficient scheduling simulator for distributed real-time systems

Santhi Baskaran, P. Thambidurai
2011 2011 International Conference on Recent Trends in Information Technology (ICRTIT)  
We present novel algorithms for energy efficient scheduling of Directed Acyclic Graph (DAG) based applications on Dynamic Voltage Scaling (DVS) enabled systems.  ...  There is also work addressing variable-voltage scaling for such systems [16] - [19] , [20] . Hybrid search strategies are used for dynamic voltage scaling [16] .  ...  For variable-voltage scheduling, the problem is more challenging since the supply voltages for executing tasks have to be optimized to maximize power savings.  ... 
doi:10.1109/icrtit.2011.5972342 fatcat:v4hu4urbtrdzvgcusmkzpkcf2e

On the energy optimization for precedence constrained applications using local search algorithms

Johnatan E. Pecero, Hector Joaquin Fraire Huacuja, Pascal Bouvry, Aurelio Alejandro Santiago Pineda, Mario Cesar Lopez Loces, Juan Javier Gonzalez Barbosa
2012 2012 International Conference on High Performance Computing & Simulation (HPCS)  
The proposed approach first uses a list-based scheduling algorithm to find near-optimal solutions for schedule length, then local search algorithms with dynamic voltage scaling are applied to reduce energy  ...  We present a scheduling algorithm based on the best-effort idea that promotes local search algorithms and dynamic voltage scaling to reduce energy consumption.  ...  This is the principle of the Dynamic Voltage Scaling (DVS) technique.  ... 
doi:10.1109/hpcsim.2012.6266902 dblp:conf/ieeehpcs/PeceroHBPLB12 fatcat:zo7ziprfvbetrapk2xccztmkzy

Task Scheduling under Performance Constraints for Reducing the Energy Consumption of the GALS Multi-Processor SoC

Ryo Watanabe, Masaaki Kondo, Masashi Imai, Hiroshi Nakamura, Takashi Nanya
2007 2007 Design, Automation & Test in Europe Conference & Exhibition  
We then show that the energy optimization problem under this model belongs to the class of Mixed-Integer Linear Programming.  ...  For these applications, pipeline scheduling is effective for reducing energy consumption.  ...  In static scheduling, the allocation of tasks onto processors and selection of the frequency/voltage level are performed prior to runtime, whereas in dynamic scheduling, the dynamic behavior of the system  ... 
doi:10.1109/date.2007.364388 dblp:conf/date/WatanabeKINN07 fatcat:lhalhyp2dnbglddn2roxkfh2ge

Optimization [chapter]

Peter Marwedel
2021 Embedded Systems  
We will then describe concurrency management for tasks. Section 7.3 comprises advanced compilation techniques. The final Sect. 7.4 introduces power and thermal management techniques.  ...  This chapter is structured as follows: first of all, we will present some high-level optimization techniques, which could precede compilation of source code or could be integrated into it.  ...  the ideal supply voltage of 4 volts, with no idle time at the end. ∇ In the following, we use the term variable voltage processor only for processors that allow any supply voltage up to a certain maximum  ... 
doi:10.1007/978-3-030-60910-8_7 fatcat:igk27foxkzbxzp2tzp2gf4xcb4

Low-power techniques for network security processors

Yi-Ping You, Chun-Yen Tseng, Yu-Hui Huang, Po-Chiun Huang, TingTing Hwang, Sheng-Yu Hsu
2005 Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05  
In this paper, we present several techniques for lowpower design, including a descriptor-based low-power scheduling algorithm, design of dynamic voltage generator, and dual threshold voltage assignments  ...  , for network security processors.  ...  We propose several techniques, including a descriptor-based variable-voltage scheduling algorithm, dynamic voltage generations, and dual-threshold voltage techniques to provide advanced power optimizations  ... 
doi:10.1145/1120725.1120869 dblp:conf/aspdac/YouTHHHH05 fatcat:lgjsc4rfrbetpov7f5r7stfava

Power-Efficient Scheduling for Heterogeneous Distributed Real-Time Embedded Systems

Jiong Luo, Niraj K. Jha
2007 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
., power profile, of tasks and characteristics of voltage-scalable processing elements (PEs) on variable-voltage scaling.  ...  The scheduling algorithm performs execution order optimization of scheduled events to increase the chances of scaling down voltages and frequencies of these voltage-scalable PEs in the distributed embedded  ...  Dynamic-voltage-scaling techniques for soft real-time systems need to tradeoff power savings for average response times of tasks.  ... 
doi:10.1109/tcad.2006.885736 fatcat:tsgimimjfjedloprqhiyswr2oa
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