1,282 Hits in 6.4 sec

1983 Index IEEE Transactions on Computers Vol. C-32

1983 IEEE transactions on computers  
Cache memories C Cache memories private caches in multiprocessor systems with parallel-pipelined memories; performance evaluation.  ...  T- CJan 83 2-95 private caches in multiprocessor systems with parallel-pipelined memories; performance evaluation.  ... 
doi:10.1109/tc.1983.1676190 fatcat:xsogjoynp5dt7mqu6dy4tiodfq

A Hybrid Approach to Reaction-Diffusion Processes Simulation [chapter]

Olga Bandman
2001 Lecture Notes in Computer Science  
A Flexible Parallel Model p. 66 Cellular-Pipelined Algorithm Architecture for Polynomial Computing p. 74 MetaPL: A Notation System for Parallel Program Description and Performance Analysis p. 80  ...  First-Order 2D Cellular Neural Networks Investigation and Learning p. 94 Quiescent Uniform Reliable Broadcast as an Introduction to Failure Detector Oracles p. 98 A Transaction Processing Model  ... 
doi:10.1007/3-540-44743-1_1 fatcat:n2cb6keyifb63cw6oj7i3rxyk4

Page 3178 of Mathematical Reviews Vol. , Issue 86g [page]

1986 Mathematical Reviews  
Sommer, Ermittlung einer op- timalen Scheduling-Strategie fiir statische Pipelines [Determina- tion of an optimal scheduling strategy for static pipelines] (pp. 547-552); Thomas Teufel, A hardware architecture  ...  Jean-Pierre Banatre and Michel Banatre, A cooperation scheme and its application to clock resynchronization in distributed systems (pp. 381-389); Maria Bertocchi and Adriana Gnudi, A parallel directives  ... 

An FPGA Framework for Genetic Algorithms: Solving the Minimum Energy Broadcast Problem

Pedro Vieira dos Santos, Jose Carlos Alves, Joao Canas Ferreira
2015 2015 Euromicro Conference on Digital System Design  
The minimum energy broadcast (MEB) problem in wireless ad hoc networks is used as a case study.  ...  In this work, we present a scalable computing array architecture to accelerate the execution of cellular GAs (cGAs), a variant of genetic algorithms which can conveniently exploit the coarse-grain parallelism  ...  A scalable hardware architecture that supports the execution of cellular GAs (cGAs) is presented, where the population evolved by the metaheuristic is distributed over several independent memories shared  ... 
doi:10.1109/dsd.2015.81 dblp:conf/dsd/SantosAF15 fatcat:uah45ek7kzaonjub4kyzsaixqm

A CNN-Specific Integrated Processor

Suleyman Malki, Lambert Spaanenburg
2009 EURASIP Journal on Advances in Signal Processing  
optimizes the system operation.  ...  The resulting node is small and supports multi-level CNN designs, giving the system a 30-fold increase in capacity compared to classical designs.  ...  Swing broadcasting allows distributing of boundary conditions in (a) three steps clockwise and (c) anticlockwise.  ... 
doi:10.1155/2009/854241 fatcat:ttrxgcsxybb6fo443uqobzjgwe

Editorial for Chinacom2015 Special Issue

Xin-Lin Huang, Xiaomin Ma, Fei Hu, Zuqing Zhu
2016 Journal on spesial topics in mobile networks and applications  
multimedia broadcast multicast service (E-MBMS) for high speed  ...  The second article titled BAn Adaptive Power Control Scheme for Multicast Service in Green Cellular Railway Communication Network^from Jiying Huang, Zhangdui Zhong and Jianwen Ding, considers enhanced  ...  In this paper, in order to achieve an energy efficient solution for wireless cellular railway network, they propose an optimal power control solution to adjust eNodeB's transmission power adaptively based  ... 
doi:10.1007/s11036-016-0742-4 fatcat:7rnjuynjkbeoxnqgmj2ce3tyqm

Pattern programming approach for teaching parallel and distributed computing

Barry Wilkinson, Jeremy Villalobos, Clayton Ferner
2013 Proceeding of the 44th ACM technical symposium on Computer science education - SIGCSE '13  
In this paper, we describe an approach for teaching parallel and distributed computing at the undergraduate level using computational patterns.  ...  A pattern programming framework has been developed to create a distributed application that avoids the need to write code in low level message-passing APIs such as MPI.  ...  Any opinions, findings, and conclusions or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the National Science Foundation.  ... 
doi:10.1145/2445196.2445319 dblp:conf/sigcse/WilkinsonVF13 fatcat:fph3pakl45e7fmgdjnqzarmtxi

Author Index

2008 2008 IEEE International Symposium on Parallel and Distributed Processing  
Achieving and Assuring High Availability Gu, Bo A Locally-Optimizing Approach for Multichannel Assignment and Routing Gu, Yi Optimizing Network Performance of Computing Pipelines in Distributed Environments  ...  Intermediate Checkpointing with Conflicting Access Prediction in Transactional Memory Systems Walker, David A Distributed Simulation Framework for Conformal Radiotherapy Walker, Robert A.  ... 
doi:10.1109/ipdps.2008.4536576 fatcat:7unikf5ywjhjtdd6xtrmcom3gq

Interactive ray tracing on reconfigurable SIMD MorphoSys

H. Du, M. Sanchez-Elez, N. Tabrizi, N. Bagherzadeh, M. L. Anido, M. Fernandez
2003 Proceedings of the 2003 conference on Asia South Pacific design automation - ASPDAC  
To support this mechanism, a special data structure is established, in which no intermediate data has to be saved. Moreover, optimizations such as object reordering and merging are facilitated.  ...  A straightforward mechanism is used to handle irregularity among parallel rays in BSP.  ...  We thank Maria-Cruz Villa-Uriol and Miguel Sainz in Image -Based-Modeling-Rendering Lab for giving sincere help in our geometry modeling and estimation.  ... 
doi:10.1145/1119772.1119869 dblp:conf/aspdac/DuSTBAF03 fatcat:guhwpvylrfgs7oaa2mwb736ou4

Demonstration and architectural analysis of complementary metal-oxide semiconductor/multiple-quantum-well smart-pixel array cellular logic processors for single-instruction multiple-data parallel-pipeline processing

Jen-Ming Wu, Charles B. Kuznia, Bogdan Hoanca, Chih-Hao Chen, Alexander A. Sawchuk
1999 Applied Optics  
The system uses 5 ϫ 10 cellular smart-pixel arrays with intrachip electrical mesh interconnections and interchip optical point-to-point interconnections.  ...  Cascading these smart-pixel array chips permits direct transfer of two-dimensional data or images in parallel.  ...  The nSPARCL performance is optimized when the distributed execution time equals the system depth, because the loading time and the execution time are balanced.  ... 
doi:10.1364/ao.38.002270 pmid:18319791 fatcat:kcurd3ryb5b75loll3k5vg3jga

A Parallel Processing Framework for Real-Time Software-Only Video Compression for Broadcast and Mobile Services

L. Zheng, J. Cosmas
2006 Journal of Intelligent Systems  
This paper develops a generic parallel processing framework on embedded multicomputer systems for real-time video compression for convergent broadcast and cellular services.  ...  Real-time performance was achieved for QCIF video using the non-optimized reference software.  ...  ACKNOWLEDGMENTS Real-Time Video Compression for Broadcast & Mobile Services Tiwari, P. and Viscito, E. 1996.  ... 
doi:10.1515/jisys.2006.15.1-4.261 fatcat:36mn23ixsbdg7cv3a5vcgqpime

Efficient VLSI Architecture for Memetic Vector Quantizer Design [chapter]

Chien-Min Ou, Wen-Jyi Hwang
2012 Genetic Algorithms in Applications  
Distributed or parallel evolutions are usually desired for attaining a near global optimal performance.  ...  Therefore, training vectors from main memory can be broadcasted to all the modules for C-means training.  ...  These evolutionary techniques may be useful to engineers and scientists in various fields of specialization, who need some optimization techniques in their work and who may be using Genetic Algorithms  ... 
doi:10.5772/37368 fatcat:3ce3nckbe5fi3akqc2nh3evr2y

Hyper-Systolic Matrix Multiplication [article]

Thomas Lippert, Nikolay Petkov, Paolo Palazzari, Klaus Schilling
1998 arXiv   pre-print
The procedure can be implemented on all types of parallel systems. It can handle matrix-vector multiplications as well as transposed matrix products.  ...  System aspects, such as SIMD or MIMD mode of operation, distributed or shared memory organization, cache or memory bank structure, construction and latency of the communication network, processor performance  ...  Background Systolic arrays Systolic arrays are cellular automata models of parallel computing structures in which data processing and transfer are pipelined and the cells carry out functions of equal  ... 
arXiv:cs/9809105v1 fatcat:b7gpgfhcoze2jnxp3wqbhbcstm

The multikernel

Andrew Baumann, Paul Barham, Pierre-Evariste Dagand, Tim Harris, Rebecca Isaacs, Simon Peter, Timothy Roscoe, Adrian Schüpbach, Akhilesh Singhania
2009 Proceedings of the ACM SIGOPS 22nd symposium on Operating systems principles - SOSP '09  
Previous high-performance computing systems have scaled in specific cases, but the dynamic nature of modern client and server workloads, coupled with the impossibility of statically optimizing an OS for  ...  using messages and can exploit insights from distributed systems and networking.  ...  Acknowledgments We would like to thank our shepherd, Jeff Dean, the anonymous reviewers, and Tom Anderson, Steven Hand, and Michael Scott for their helpful suggestions for how to improve this paper and Barrelfish in  ... 
doi:10.1145/1629575.1629579 dblp:conf/sosp/BaumannBDHIPRSS09 fatcat:6dha7l4czrd7pjuvcu6xt2v56i

Invalidation-Based Protocols for Replicated Datastores [article]

Antonios Katsarakis
2021 arXiv   pre-print
Distributed in-memory datastores underpin cloud applications that run within a datacenter and demand high performance, strong consistency, and availability.  ...  The primary contribution of this thesis is in adapting invalidating protocols to the nuances of replicated datastores, which include skewed data accesses, fault tolerance, and distributed transactions.  ...  TreadMarks: Distributed Shared Memory on Standard Workstations and Operating Systems.  ... 
arXiv:2112.02405v1 fatcat:toi3wflouvbzngpdfzypw3l4li
« Previous Showing results 1 — 15 out of 1,282 results