409 Hits in 3.4 sec

Fast and Energy-Efficient OLAP Data Management on Hybrid Main Memory Systems

Ahmad Hassan, Dimitrios Nikolopoulos, Hans Vandierendonck
2019 IEEE transactions on computers  
This paper studies the problem of efficiently utilizing hybrid memory systems, consisting of both Dynamic Random Access Memory (DRAM) and novel Non-Volatile Memory (NVM) in database management systems  ...  Index Terms-Non-volatile memory, hybrid main memory, database management system !  ...  Fig. 1 : 1 Operating system interface for mapping data to hybrid memory.  ... 
doi:10.1109/tc.2019.2919287 fatcat:dokvn7u3x5filpqpeozstwlqhq

Supporting Superpages and Lightweight Page Migration in Hybrid Memory Systems [article]

Xiaoyuan Wang
2018 arXiv   pre-print
However, superpages often preclude lightweight page migration, which is crucial for performance and energy efficiency in hybrid memory systems composed of DRAM and non-volatile memory (NVM).  ...  Superpages have long been used to mitigate address translation overhead in big memory systems.  ...  Hybrid memory systems composed of DRAM and NVM usually can provide very large memory capacity, and thus are more eager for the support of superpages.  ... 
arXiv:1806.00776v1 fatcat:quiwsztocra3pmnnesks64exve

A Survey of Hybrid Main Memory Architectures

2019 Sakarya University Journal of Science  
In this research, we investigate hybrid main memory systems for a more efficient main memory architecture.  ...  Another study to address this increasing demand is the development of hybrid main memory architectures. Hybrid Main Memory is one of the most recent studies on RAM.  ...  DRAM + NVM Architectures In hybrid main memory systems, which are currently proposed as an ideal solution for main memory architecture, it is very important to balance the memory types used.  ... 
doi:10.16984/saufenbilder.334645 fatcat:r36y2uh5azenxg6pj2n5c74a7i

Software-managed energy-efficient hybrid DRAM/NVM main memory

Ahmad Hassan, Hans Vandierendonck, Dimitrios S. Nikolopoulos
2015 Proceedings of the 12th ACM International Conference on Computing Frontiers - CF '15  
This paper evaluates the viability of user-level software management of a hybrid DRAM/NVM main memory system.  ...  Utilizing this property significantly reduces the hardware complexity of hybrid memory systems.  ...  Acknowledgement We thank our shepherd, Diana Franklin, and the anonymous reviewers for their valuable feedback.  ... 
doi:10.1145/2742854.2742886 dblp:conf/cf/HassanVN15 fatcat:csollnqu4vbljd6runtjsxqcxm

Evaluation of emerging memory technologies for HPC, data intensive applications

Amoghavarsha Suresh, Pietro Cicotti, Laura Carrington
2014 2014 IEEE International Conference on Cluster Computing (CLUSTER)  
Several emerging memory technologies have the potential to compensate for the limitations of DRAM when replacing or complementing DRAM in the memory sub-system.  ...  We also explore a hybrid DRAM-NVM design with a partitioned address space and find that this approach is marginally beneficial compared to the simpler 5-level design.  ...  This work used the Extreme Science and Engineering Discovery Environment (XSEDE), which is supported by National Science Foundation grant number ACI-1053575.  ... 
doi:10.1109/cluster.2014.6968745 dblp:conf/cluster/SureshCC14 fatcat:jdhpw625xvbz3bafggy5hzxcnq

Architecting Non-Volatile Main Memory to Guard Against Persistence-based Attacks [article]

Fan Yao, Guru Venkataramani
2019 arXiv   pre-print
We also explore the effect of encryption on a hybrid main memory that has a DRAM buffer cache plus PCM main memory.  ...  DRAM-based main memory and its associated components increasingly account for a significant portion of application performance bottlenecks and power budget demands inside the computing ecosystem.  ...  In order to minimize frequent writes to NVM and to avoid performance loss for such memory-bound applications, a hybrid PCM-DRAM memory configuration with a relatively smaller DRAM buffer that acts as a  ... 
arXiv:1902.03518v1 fatcat:lxenfuttzzedzebghxe4lktb54

Modeling, Architecture, and Applications for Emerging Memory Technologies

Yuan Xie
2011 IEEE Design & Test of Computers  
Traditional memory hierarchy design consists of embedded memory (such as SRAM and embedded DRAM [eDRAM]) for on-chip caches, commodity DRAM for main memory, and magnetic hard disk drives (HDDs) for storage  ...  Such emerging nonvolatile memory (NVM) technologies combine the speed of SRAM, the density of DRAM, and the nonvolatility of flash memory, and so become very attractive as alternatives for the future memory  ...  Acknowledgments The work in this article was supported in part by National Science Foundation grants 1017277, 0903432, and by Semiconductor Research Corporation, Qualcomm, and the US Department of Energy  ... 
doi:10.1109/mdt.2011.20 fatcat:rmgrdwnxd5hpnla4whhmanomt4

Hotspot-aware Hybrid Memory Management for In-Memory Key-Value Stores

Hai Jin, Zhiwei Li, Haikun Liu, Xiaofei Liao, Yu Zhang
2019 IEEE Transactions on Parallel and Distributed Systems  
Hybrid memory systems composed of DRAM and NVM have the potential to provide very large capacity of main memory for in-memory key-value (K-V) stores.  ...  In this paper, we propose HMCached, an in-memory K-V store built on a hybrid DRAM/NVM system.  ...  ACKNOWLEDGMENTS The authors would like to thank the anonymous reviewers for their insightful comments. This  ... 
doi:10.1109/tpds.2019.2945315 fatcat:csir67c37fbpvosoyhccbjxw4a

Memory and Storage System Design with Nonvolatile Memory Technologies

Jishen Zhao, Cong Xu, Ping Chi, Yuan Xie
2015 IPSJ Transactions on System LSI Design Methodology  
The memory and storage system, including processor caches, main memory, and storage, is an important component of various computer systems.  ...  This article reviews recent innovations in rearchitecting the memory and storage system with NVMs, producing high-performance, energy-efficient, and scalable computer designs.  ...  Conclusion For decades, computer systems adopt SRAM as caches, DRAM as main memory, and disks/flash as storage.  ... 
doi:10.2197/ipsjtsldm.8.2 fatcat:hjmdxg6wgzblpess3ejbdqa2m4

Q-Selector-Based Prefetching Method for DRAM/NVM Hybrid Main Memory System

Jeong-Geun Kim, Shin-Dug Kim, Su-Kyung Yoon
2020 Electronics  
This research is to design a Q-selector-based prefetching method for a dynamic random-access memory (DRAM)/ Phase-change memory (PCM)hybrid main memory system for memory-intensive big data applications  ...  Specifically, the proposed method fully exploits the advantages of two-level hybrid memory systems, constructed as DRAM devices and non-volatile memory (NVM) devices.  ...  memory, • PCM only: a baseline configuration based on DDR4-PCM main memory without DRAM devices, • DRAM/PCM hybrid memory system: a hybrid main memory-based system based on DRAM/NVM devices without any  ... 
doi:10.3390/electronics9122158 fatcat:tsrauw6it5ayxjozoste4ovz6a

Memos: A full hierarchy hybrid memory management framework

Lei Liu, Hao Yang, Yong Li, Mengyao Xie, Lian Li, Chenggang Wu
2016 2016 IEEE 34th International Conference on Computer Design (ICCD)  
In this paper, we introduce memos, which integrates suitable memory management policies and schedules resources over the entire memory hierarchy in hybrid memory system.  ...  Moreover, memos can reduce the NVM side memory latency by 3~83.3%, energy consumption by 25.1~99%, and benefit the NVM lifetime significantly (40X improvement on average).  ...  hybrid DRAM-NVM main memory system, an effective memory management scheme should be aware of memory access characteristics, since the performance of NVM and DRAM are sensitive to certain behaviors such  ... 
doi:10.1109/iccd.2016.7753305 dblp:conf/iccd/LiuYLXLW16 fatcat:v2uacheltjhcbhsqecf2fikvkm

Exploring Opportunities for Non-volatile Memories in Big Data Applications [chapter]

Wei Wei, Dejun Jiang, Jin Xiong, Mingyu Chen
2014 Lecture Notes in Computer Science  
Thus, DRAM-based memory system incurs excessive cost to meet both capacity and energy requirements for the emerging big data workloads.  ...  Designing memory system comprising both DRAM and NVMs requires to understand the memory access behaviors of big data applications.  ...  We also propose hybrid memory architecture as a desirable design choice for integrating NVMs into main memory system.  ... 
doi:10.1007/978-3-319-13021-7_16 fatcat:uff4aakaofcptn4oiowqtradm4

Symbiotic HW Cache and SW DTLB Prefetching for DRAM/NVM Hybrid Memory

Onkar Patil, Frank Mueller, Latchesar Ionkov, Jason Lee, Michael Lang
2020 2020 28th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS)  
DRAM/NVM based hybrid memory systems aim to support larger datasets for applications, which means more memory pages will be fetched by the CPU [9] .  ...  [15] characterized the performance of a DRAM/NVM hybrid memory system for HPC applications.  ... 
doi:10.1109/mascots50786.2020.9285963 fatcat:zjftpa6akbakfi6q3ltzpl3qr4


Luis Angel Bathen, Nikil Dutt
2012 Proceedings of the 49th Annual Design Automation Conference on - DAC '12  
We present HaVOC: a run-time memory manager that virtualizes the hybrid on-chip memory space and supports efficient sharing of distributed ScratchPad Memories (SPMs) and NVMs.  ...  Hybrid on-chip memories that combine Non-Volatile Memories (NVMs) with SRAMs promise to mitigate the increasing leakage power of traditional on-chip SRAMs.  ...  [8] introduced a memory management module for hybrid DRAM/PCM main memories. Static analysis has been explored to efficiently map application data on off-chip hybrid main memories [23, 22] .  ... 
doi:10.1145/2228360.2228438 dblp:conf/dac/BathenD12 fatcat:x2vm3ilqtfa6pfdcs7x7qpyjha

Memos: Revisiting Hybrid Memory Management in Modern Operating System [article]

Lei Liu, Mengyao Xie, Hao Yang
2017 arXiv   pre-print
The emerging hybrid DRAM-NVM architecture is challenging the existing memory management mechanism in operating system.  ...  In this paper, we introduce memos, which can schedule memory resources over the entire memory hierarchy including cache, channels, main memory comprising DRAM and NVM simultaneously.  ...  Conventionally, there are two different ways of organizing a hybrid DRAM-NVM (Fast-Slow) main memory system.  ... 
arXiv:1703.07725v1 fatcat:wzdseqs4pbc7nozfejrllqszl4
« Previous Showing results 1 — 15 out of 409 results