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Circuit authentication based on Ring-Oscillator PUFs

Susana Eiroa, Iluminada Baturone
2011 2011 18th IEEE International Conference on Electronics, Circuits, and Systems  
The use of Ring Oscillator PUFs to provide circuit authentication is analyzed in this paper.  ...  The limitations of the previously reported approach in terms of false rejection (due to high intra-die variations) and false acceptance (due to small inter-die variations) are discussed.  ...  The delay variability in different physical realizations of the same circuit is exploited by arbiter and ring oscillator (RO) PUFs [6] .  ... 
doi:10.1109/icecs.2011.6122368 dblp:conf/icecsys/EiroaB11 fatcat:7pytop4rgndf5fdxjlsllvlvoe

Investigation of ROPUF with Improved Temperature Performance on FPGA

Aman Pandey
2018 Helix  
RO frequency is dependent on the placement of the RO on the FPGA, and improvement in the reliability of an ROPUF by implementing every Ring Oscillator in a single configurable logic block was founded by  ...  Among several PUF designs, Ring Oscillator Physically Unclonable Function (ROPUF) is one of the most favoured PUF design and it can be easily implemented in Field Programmable Gate Array (FPGA).  ...  According to the results, it is evident that this ROPUF design is suitable for addressing problem of identification of Integrated circuits in real world as PUF runs with full effectiveness even under environmental  ... 
doi:10.29042/2018-4334-4339 fatcat:ahehg4gvxbhyjdsddykk3bwe6e

Routing Density Analysis of Area-Efficient Ring Oscillator Physically Unclonable Functions

Zulfikar Zulfikar, Norhayati Soin, Sharifah Fatmadiana Wan Muhamad Hatta, Mohamad Sofian Abu Talip, Anuar Jaafar
2021 Applied Sciences  
The performance metrics (uniqueness and reliability) of the proposed RO-PUF are much better than existing works using a similar FPGA platform (Altera), and it is as good as the recent RO-PUFs realized  ...  However, a substantial study has yet to be carried out in developing designs of the FPGA-based RO-PUF, which effectively balances performance and area efficiency.  ...  Conflicts of Interest: The authors declare no conflict of interest.  ... 
doi:10.3390/app11209730 fatcat:sbcdu5titjhd3o3qp3snu6d6p4

Hardware authentication based on PUFs and SHA-3 2nd round candidates

Susana Eiroa, Iluminada Baturone
2010 2010 International Conference on Microelectronics  
This paper describes the hardware implementation of a symmetric-key authentication protocol in which a PUF is one of the relevant blocks.  ...  are included and, based on them, several cryptographic protocols have been reported.  ...  Among them, ring oscillator PUFs are the best option concerning uniqueness and reliability [10] .  ... 
doi:10.1109/icm.2010.5696149 fatcat:m3lfe7gdsncqfmwa267jq3mvy4

Fault Tolerant Implementations of Delay-Based Physically Unclonable Functions on FPGA

Durga Prasad Sahoo, Sikhar Patranabis, Debdeep Mukhopadhyay, Rajat Subhra Chakraborty
2016 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)  
We validate the robustness of our proposed fault tolerant delay-based PUF designs on Xilinx Artix-7 FPGA platform.  ...  In this paper, we propose novel and efficient architectures for a variety of widely used delay-based PUFs which are robust against high precision laser fault attacks proposed by Tajik et al. in FDTC-2015  ...  Alternatively, in [19] , authors observe the correlation between the reliability of XOR PUF and its component APUFs, and they employ this fact to model the individual APUFs based on the reliability information  ... 
doi:10.1109/fdtc.2016.10 dblp:conf/fdtc/SahooPMC16 fatcat:dr67xs6yx5f33luee32g5dywku

Runtime Analysis of Area-Efficient Uniform RO-PUF for Uniqueness and Reliability Balancing

Zulfikar Zulfikar, Norhayati Soin, Sharifah Fatmadiana Wan Muhamad Hatta, Mohamad Sofian Abu Talip
2021 Electronics  
The main issue of ring oscillator physical unclonable functions (RO-PUF) is the existence of unstable ROs in response to environmental variations.  ...  Moreover, the reliability is higher than that of RO-PUF with challenge and response pair (CRP) enhancements.  ...  Introduction The first ring oscillator PUF (RO-PUF) model was proposed by Gassend et al. [1, 2] . The authors adopted the Arbiter PUF for extracting the delay of the switch box route.  ... 
doi:10.3390/electronics10202504 fatcat:e7ysrhfam5bdhjnqst2zynef5u

Enhancing PUF Based Challenge–Response Sets by Exploiting Various Background Noise Configurations

Honorio Martin, Pedro Peris-Lopez, Giorgio Natale, Mottaqiallah Taouil, Said Hamdioui
2019 Electronics  
Ring Oscillators (RO)-based PUF, which are one of the most implemented on FPGA, suffer from a low number and size of CRPs.  ...  We validated our proposal using FPGA measurements. The results show that, with the same number of Ring Oscillators, the CRP size can be doubled with a minimum area overhead.  ...  The founding sponsors had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, and in the decision to publish the results.  ... 
doi:10.3390/electronics8020145 fatcat:bhblrjbfybah5knkffbhc3gyf4

D2.1 - Report On Selected Trng And Puf Principles

Martin DEUTSCHMANN, Sandra LATTACHER, Jeroen DELVAUX, Vladimir ROZIC, Bohan YANG, Dave SINGELEE, Lilian BOSSUET, Viktor FISCHER, Ugo MUREDDU, Oto PETURA, Alexandre ANZALA YAMAJAKO, Bernard KASSER (+1 others)
2016 Zenodo  
(FPGAs) and Application Specific Integrated Circuits (ASICs) during the next phases of the project.  ...  This report represents the final version of Deliverable 2.1 of the HECTOR work package WP2. It is a result of discussions and work on Task 2.1 of all HECTOR partners involved in WP2.  ...  Power-optimized architecture of the RO-PUF as implemented in Spartan 6 FPGA and a TERO cell (one transition-effect ring oscillator composed of two branches containing six buffers and one NAND gate each  ... 
doi:10.5281/zenodo.801084 fatcat:skmzazmuxrh55mvi2sucgi4oga

Enhancing the Performance of Lightweight Configurable PUF for Robust IoT Hardware-Assisted Security

Fathi Amsaad, Ahmed Oun, Mohammed Niamat, Abdul Razaque, Seluck Kose, Mohamed Mahmoud, Waleed Alasmary, Fawaz Alsolami
2021 IEEE Access  
The lightweight CF-ROPUF design is realized on hardware, and data samples are collected under varying temperatures and supply voltages over a population of 30 Spartan-3E FPGAs.  ...  This paper proposes two novel security techniques to enhance the robustness of LPUFs using configurable-based ring oscillator PUFs (CF-ROPUFs).  ...  ACKNOWLEDGMENT The statements made herein are solely the responsibility of the authors. The authors, therefore, acknowledge with thanks to DSR for technical and financial support.  ... 
doi:10.1109/access.2021.3117240 fatcat:5rjcikw7dvfyjbsjvjwxa4eqia

A Lightweight LFSR-Based Strong Physical Unclonable Function Design on FPGA (January 2019)

Shen Hou, Yang Guo, Shaoqing Li
2019 IEEE Access  
However, most of the traditional strong PUF designs represented by the arbiter PUF are difficult to implement on FPGA.  ...  Physical unclonable function (PUF), a reliable physical security primitive, can be implemented in FPGAs and ASICs.  ...  Delay-based PUF mainly includes RO (ring oscillator) PUF [15] , [16] , arbiter-based PUF [17] . Suh and Devadas proposed RO PUF in [16] .  ... 
doi:10.1109/access.2019.2917259 fatcat:6uvduupcnjhc5pvw2y3tgyujne

Hardware/software co-design of physical unclonable function based authentications on FPGAs

Aydin Aysu, Patrick Schaumont
2015 Microprocessors and microsystems  
The asynchronous design is realized on the Xilinx Virtex-5 FPGAs and tested on 100 boards.  ...  Measurements reveal that the proposed solutions can authenticate trillions of devices and provide better performance than the ring oscillator based alternative. [1], tamper-resistant key storage [2], bitstream  ...  We also want to acknowledge Ege Gulcan and Bilgiday Yuce for their contributions to the measurements.  ... 
doi:10.1016/j.micpro.2015.04.001 fatcat:iffllsak7ndbvnrzimuysfukg4

A Lightweight and Secure-Enhanced Strong PUF Design on FPGA

Shen Hou, Yang Guo, Shaoqing Li, Ding Deng, Yan Lei
2019 IEICE Electronics Express  
Physical unclonable function (PUF) is a reliable physical security primitive. The Weak PUF and Strong PUF are two well-known PUF topologies.  ...  Classic PUF designs, like arbiter PUF, are hard to implement on FPGA and severely threatened by the machine learning based modeling attacks.  ...  Acknowledgments This work was supported by the National Natural Science Foundation of China under Grant No 61832018.  ... 
doi:10.1587/elex.16.20190695 fatcat:6ylw2luycjdmnasijrxhquuntq

Evaluation of delay PUFs on CMOS 65 nm technology

Zouha Cherif, Jean-Luc Danger, Florent Lozac'h, Yves Mathieu, Lilian Bossuet
2013 Proceedings of the 2nd International Workshop on Hardware and Architectural Support for Security and Privacy - HASP '13  
The performances are analyzed for two types of silicon PUFs, namely the arbiter and the loop PUFs.  ...  This paper presents a comparative study of delay Physically Unclonable Functions (PUFs) designed in CMOS-65nm technology platforms: ASIC and FPGA (Xilinx Virtex-5).  ...  Acknowledgement: This work was strongly supported by the european project ENIAC "TOISE", allowing us to design the ASIC, and the collaborative project "SCALA" between Institut Mines-Télécom and Orange  ... 
doi:10.1145/2487726.2487730 dblp:conf/isca/CherifDLMB13 fatcat:a54fwglctzchbjtmdhhsmrebpu

A dynamic PUF anti-aging authentication system based on restrict race code

Bing Li, Shuai Chen
2015 Science China Information Sciences  
Ring oscillators PUF are the result of an array of identically laid-out ring oscillators that produce different output after judgment because of the manufacturing differences [?] .  ...  The experimental data are based on an SRAM PUF implemented on FPGA.  ...  Thus, there are enough CVC rings to be selected in PUF circuit to ensure its randomness and keep a strong anti-replay attack resistance.  ... 
doi:10.1007/s11432-015-5287-9 fatcat:chzwmcmfjjfalash6qt3ibn6ye

Digitization Algorithms in Ring Oscillator Physically Unclonable Functions as a Main Factor Achieving Hardware Security

Guillermo Diez-Senorans, Miguel Garcia-Bosque, Carlos Sanchez-Azqueta, Santiago Celma
2021 IEEE Access  
In this article we focus on well known PUF candidates based on ring oscillator delay, which are ideal for FPGA prototyping due to their tolerance to asymmetries in routing.  ...  Since the discovery of the physical random functions and their subsequent refinement into physical unclonable functions (PUF), a great effort has been made in developing and characterizing these objects  ...  CONCLUSIONS In this work we have analyzed the outcome probability distribution of a ring oscillator PUF implemented in FPGA, on the light of the digitization algorithms only.  ... 
doi:10.1109/access.2021.3123867 fatcat:zezcjvjgt5cxpopuotfqr6rc5a
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