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Performance Assessment of Deep Learning Frameworks through Metrics of CPU Hardware Exploitation on an Embedded Platform

Delia Velasco-Montero, Jorge Fernández-Berni, Ricardo Carmona-Galán, Ángel Rodríguez-Vázquez
2020 International journal of electrical and computer engineering systems  
It also facilitates the selection of frameworks and networks among a large diversity of these components available these days for visual understanding.  ...  We demonstrate that a strong correlation exists between hardware events occurring in the processor and inference performance.  ...  ACknowLEDGMEnt The current archival periodical article is based on the conference presentation [48] .  ... 
doi:10.32985/ijeces.11.1.1 fatcat:g3j5e5n25nhbzf7c62ockvj2by

Using BIP for Modeling and Verification of Networked Systems -- A Case Study on TinyOS-based Networks

Ananda Basu, Laurent Mounier, Marc Poulhies, Jacques Pulou, Joseph Sifakis
2007 Sixth IEEE International Symposium on Network Computing and Applications (NCA 2007)  
Models for networks are obtained by composition of models for nodes by using BIP connectors implementing different types of radio channels.  ...  The methodology consists in building the model of a node as the composition of a model extracted from a nesC program describing the application, and models of TinyOS components.  ...  The latter is obtained by composing controllers for the execution of tasks, events, radio and hardware devices.  ... 
doi:10.1109/nca.2007.52 dblp:conf/nca/BasuMPPS07 fatcat:xmbskojohfd5plgvi6uv7j4hsa

Cross-core event monitoring for processor failure prediction

Felix Salfner, Peter Troger, Steffen Tschirpke
2009 2009 International Conference on High Performance Computing & Simulation  
A recent trend in the design of commodity processors is the combination of multiple independent execution units on one chip.  ...  The prediction relies on the analysis of processor hardware performance counters by a statistical rank-sum test.  ...  This resulted in a behavior where the CPU continued to operate for a short period of time after the initial MCE (there were always subsequent fatal ones).  ... 
doi:10.1109/hpcsim.2009.5191988 dblp:conf/ieeehpcs/SalfnerTT09 fatcat:gh5jatoe5zb2hnnebvdf3rmtly

Tracing Hardware Monitors in the GR712RC Multicore Platform: Challenges and Lessons Learnt from a Space Case Study

Xavier Palomo, Mikel Fernandez, Sylvain Girbal, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla, Laurent Rioux, Marcus Völp
2020 Euromicro Conference on Real-Time Systems  
We address the profiling problem on a representative COTS platform for the aerospace domain to find that the availability of directly-accessible hardware counters is not a given, and it may be necessary  ...  One of the prominent challenges is software timing analysis, a fundamental step in the verification and validation process.  ...  Here, the relevant information consists in all hardware events with bearing on the timing behavior.  ... 
doi:10.4230/lipics.ecrts.2020.15 dblp:conf/ecrts/PalomoFGMACR20 fatcat:h7jvmqhhxzf5rbabvqebpmtaqa

Fitting Software Execution-Time Exceedance into a Residual Random Fault in ISO-26262

Irune Agirre, Francisco J. Cazorla, Jaume Abella, Carles Hernandez, Enrico Mezzetti, Mikel Azkarate-askatsua, Tullio Vardanega
2018 IEEE Transactions on Reliability  
The increasing complexity of modern on-board computers, however, questions the very notion of treating the violation of execution-time envelopes for software programs as a systematic fault.  ...  Timing Analysis (MBPTA) to quantify, constructively, the failure rates resulting from the likelihood of execution-time exceedance events.  ...  University of Padova the build automation for the AURIX target.  ... 
doi:10.1109/tr.2018.2828222 fatcat:hzlyp72zbbeiblztko4pesegse

Comprehending performance from real-world execution traces

Xiao Yu, Shi Han, Dongmei Zhang, Tao Xie
2014 Proceedings of the 19th international conference on Architectural support for programming languages and operating systems - ASPLOS '14  
We instantiate our approach to study the performance of device drivers on over 19,500 real-world execution traces.  ...  The impact analysis measures performance impacts on a component basis, and the causality analysis discovers patterns of runtime behaviors that are likely to cause the measured impacts.  ...  Acknowledgments We would like to thank the conference reviewers and shepherds for their feedback in finalizing this paper.  ... 
doi:10.1145/2541940.2541968 dblp:conf/asplos/YuHZX14 fatcat:vaf33tmttvfllhahuudvttum5y

WHISPER A Tool for Run-time Detection of Side-Channel Attacks

Maria Mushtaq, Jeremy Bricq, Muhammad Khurram Bhatti, Ayaz Akram, Vianney Lapotre, Guy Gogniat, Pascal Benoit
2020 IEEE Access  
WHISPER uses multiple machine learning models in an Ensemble fashion to detect SCAs at runtime using behavioral data of concurrent processes, that are collected through hardware performance counters (HPCs  ...  of early stage detection, i.e., at the very least before the attack is completed.  ...  FIGURE 13 . 13 Run-time behavior of selected hardware events under No Load conditions for Spectre Attack.  ... 
doi:10.1109/access.2020.2988370 fatcat:a7lzt2gq3jbgzcggvnzdnzvaba

Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures

Marcio Castro, Kiril Georgiev, Vania Marangozova-Martin, Jean-Francois Mehaut, Luiz Gustavo Fernandes, Miguel Santana
2011 2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing  
In order to gain some insight on these issues, helping developers to understand and improve the performance of TM applications, we propose a generic approach for collecting and tracing relevant information  ...  It offers a higher-level programming interface and promises to greatly simplify the development of correct concurrent applications on multicore architectures.  ...  For all experiments, we have obtained a maximum intrusiveness of 9.90% and 7.63% considering the execution time and the number of aborts, respectively.  ... 
doi:10.1109/pdp.2011.27 dblp:conf/pdp/CastroGMMFS11 fatcat:5iflpiq6cnb55obw3qrwcwbsbq

Real time Detection of Spectre and Meltdown Attacks Using Machine Learning [article]

Bilal Ali Ahmad
2020 arXiv   pre-print
attacks by identifying the misuse of speculative execution and side-channel attacks.  ...  In order to mitigate against Spectre and Meltdown attacks while retaining the performance benefits of modern processors, in this paper, we present a real-time detection mechanism for Spectre and Meltdown  ...  Relevant hardware events selected for Spectre attacks are listed in Table 1 . For Meltdown attack detection, we used both hardware and software events as features to machine learning models.  ... 
arXiv:2006.01442v1 fatcat:ybjy6xxyxjhpznfkwfj3iwgufu

ASAP: Reconciling Asynchronous Real-Time Operations and Proofs of Execution in Simple Embedded Systems [article]

Adam Caulfield, Norrathep Rattanavipanon, Ivan De Oliveira Nunes
2022 arXiv   pre-print
Despite this significant progress, current PoX schemes for low-end MCUs ignore the real-time needs of many applications.  ...  Motivated by this issue, recent work developed architectures capable of generating Proofs of Execution (PoX) for the correct/expected software in potentially compromised low-end MCUs.  ...  Therefore, we pose a natural question: Are secure proofs of execution attainable for executables that must process asynchronous and real-time events/inputs?  ... 
arXiv:2206.02894v1 fatcat:znihsazn6rapfmmymmhmgwj6yu

Run-time Detection of Prime + Probe Side-Channel Attack on AES Encryption Algorithm

Maria Mushtaq, Ayaz Akram, Muhammad Khurram Bhatti, Rao Naveed Bin Rais, Vianney Lapotre, Guy Gogniat
2018 2018 Global Information Infrastructure and Networking Symposium (GIIS)  
The mechanism comprises of multiple machine learning models, which use real-time data from the HPCs for detection.  ...  This paper presents a run-time detection mechanism for access-driven cache-based Side-Channel Attacks (CSCAs) on Intel's x86 architecture.  ...  We collected a system-wide profile for different hardware events under Prime+Probe attack to form a data set of benign and malicious behavior on the system.  ... 
doi:10.1109/giis.2018.8635767 dblp:conf/giis/MushtaqABRLG18 fatcat:rbmv56qiarbl5lkx2ar2eampiq

Performance Instrumentation and Measurement for Terascale Systems [chapter]

Jack Dongarra, Allen D. Malony, Shirley Moore, Philip Mucci, Sameer Shende
2003 Lecture Notes in Computer Science  
To help achieve this mapping, performance analysis tools must provide robust performance observation capabilities at all levels of the system, as well as map low-level behavior to high-level program constructs  ...  Instrumentation and measurement strategies, developed over the last several years, must evolve together with performance analysis infrastructure to address the challenges of new scalable parallel systems  ...  Collecting PAPI data for various events over intervals of time and displaying this data alongside the Vampir timeline view enables correlation of event frequencies with message passing behavior.  ... 
doi:10.1007/3-540-44864-0_6 fatcat:atb2na5wj5gwdbwjisggnvi6vy

MATANA: A Reconfigurable Framework for Runtime Attack Detection Based on the Analysis of Microarchitectural Signals

Yuxiao Mao, Vincent Migliore, Vincent Nicomette
2022 Applied Sciences  
These attacks are extremely powerful and hard to detect since the determination of the program execution's impact on the microarchitecture is at the same time not precisely understood and not easily observable  ...  was not meant to be used for cybersecurity, with reduced choice on observable signals and limited throughput of information.  ...  time of one access to the cache.  ... 
doi:10.3390/app12031452 fatcat:fyzd5sragjbjlpwhxskygzflh4

WiFröst

William McGrath, Jeremy Warner, Mitchell Karchemsky, Andrew Head, Daniel Drew, Bjoern Hartmann
2018 The 31st Annual ACM Symposium on User Interface Software and Technology - UIST '18  
Right: The WiFröst UI has 5 main panels: a code editor; a console log; a visualization of the captured execution trace; a property inspector which displays contextually relevant information depending on  ...  active UI element, like the duration of a line of code, or the parsed content of an HTTP response; and an issues list that automatically displays notifications about system behavior irregularities or  ...  Every time a new event is queued in the event stream, WiFröst re-runs a suite of error checkers on the history of events; see Fig. 7 for a list of the currently implemented checkers.  ... 
doi:10.1145/3242587.3242668 dblp:conf/uist/McGrathWKHDH18 fatcat:av7dgy7d3nemrbauy5uoqkhee4

Review of Model-Based Testing Approaches in Production Automation and Adjacent Domains—Current Challenges and Research Gaps

Susanne Rösch, Sebastian Ulewicz, Julien Provost, Birgit Vogel-Heuser
2015 Journal of Software Engineering and Applications  
The goal of this paper is to review these approaches regarding their suitability for the domain of production automation in order to identify current trends and research gaps.  ...  used within the development process of production automation systems, test case generation from fault models or test case selection and regression testing.  ...  Therefore, the time needed for the analysis plus the execution of the selected test cases is supposed to be lower than executing all test cases.  ... 
doi:10.4236/jsea.2015.89048 fatcat:35hb3j25izcc7jq73xlyeihlwa
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