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On signal tracing in post-silicon validation

Qiang Xu, Xiao Liu
2010 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)  
It is increasingly difficult to guarantee the first silicon success for complex integrated circuit (IC) designs. Post-silicon validation has thus become an essential step in the IC design flow.  ...  Tracing internal signals during circuit's normal operation, being able to provide real-time visibility to the circuit under debug (CUD), is one of the most effective silicon debug techniques and has gained  ...  Design Phase Post-silicon Debug Phase Analysis Phase Y N Y Run post-silicon analysis Insert DfD Hardware Transfer data through trace port Store data in trace buffer Fig. 4.  ... 
doi:10.1109/aspdac.2010.5419883 dblp:conf/aspdac/XuL10 fatcat:5ftlnjsgmbf6ro5vvlufbfvnhq

On Signal Tracing for Debugging Speedpath-Related Electrical Errors in Post-Silicon Validation

Xiao Liu, Qiang Xu
2010 2010 19th IEEE Asian Test Symposium  
One of the most challenging problems in post-silicon validation is to identify those errors that cause prohibitive extra delay on speedpaths in the circuit under debug (CUD) and only expose themselves  ...  To address this problem, we propose a trace-based silicon debug solution, which provides real-time visibility to the speedpaths in the CUD during normal operation.  ...  To the best of our knowledge, this is the first trace-based solution for debugging electrical errors in general logic circuits in post-silicon validation.  ... 
doi:10.1109/ats.2010.50 dblp:conf/ats/LiuX10 fatcat:lj4kere6kzd6zctoxerwodaxfq

Interconnection fabric design for tracing signals in post-silicon validation

Xiao Liu, Qiang Xu
2009 Proceedings of the 46th Annual Design Automation Conference on ZZZ - DAC '09  
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits.  ...  These trace signals need to be transferred to on-chip buffers and/or off-chip trace ports for analysis.  ...  ACKNOWLEDGEMENTS This work was supported in part by the General Research Fund CUHK417406, CUHK417807, and CUHK418708 from Hong Kong SAR Research Grants Council, and in part by a grant N_CUHK417/08 from  ... 
doi:10.1145/1629911.1630006 dblp:conf/dac/LiuX09 fatcat:quzfhmwwqrhbvmj7xuykgoib34

Trace signal selection to enhance timing and logic visibility in post-silicon validation

Hamid Shojaei, Azadeh Davoodi
2010 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)  
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-silicon validation.  ...  In addition, we observe that different selections of trace signals can result in the same quality, measured as a logic visibility metric.  ...  Debug Process: During post-silicon validation, upon observing a bug, one can detect the corresponding input patterns (e.g., instruction in a microprocessor) at that instance.  ... 
doi:10.1109/iccad.2010.5654123 dblp:conf/iccad/ShojaeiD10 fatcat:tllr7dv5wfcztlfqqso2skmfta

Automated trace signals identification and state restoration for improving observability in post-silicon validation

Ho Fai Ko, Nicola Nicolici
2008 Proceedings of the conference on Design, automation and test in Europe - DATE '08  
This paper introduces an automated method for improving the utilization of the on-chip storage, by identifying a small set of trace signals from which a large number of states can be restored using a compute-efficient  ...  Nonetheless, the amount of data that is observed is limited by the capacity of the on-chip trace buffers.  ...  during post-silicon validation.  ... 
doi:10.1145/1403375.1403689 fatcat:p4p4lcscyffkfejbd62vj6gioi

An Approach to Mathematically Correlate Timing of Transaction Activity Between Pre-silicon and Post-silicon Environment

Anala, S. Gayathri, Ramesh Ramaswamy, Chetan Waghmare
2020 SN Computer Science  
Hence, trace data read from trace buffer in post-silicon environment is not accurate from debug perspective.  ...  Post-silicon validation is a major challenge due to finite controllability and observability of actual silicon and makes debug a complex task.  ...  In the recent times, the design has been provided with post-silicon validation and debug infrastructure [2] .  ... 
doi:10.1007/s42979-020-0105-x fatcat:5f5pcsnh3bgjhgh7uiljyobrry

Post-silicon validation opportunities, challenges and recent advances

Subhasish Mitra, Sanjit A. Seshia, Nicola Nicolici
2010 Proceedings of the 47th Design Automation Conference on - DAC '10  
Post-silicon validation is used to detect and fix bugs in integrated circuits and systems after manufacture.  ...  In this paper, we provide an overview of the post-silicon validation problem and how it differs from traditional pre-silicon verification and manufacturing testing.  ...  Acknowledgment This work is supported in part by the Semiconductor Research Corporation (SRC), the Gigascale Systems Research Center, one of six research centers funded under the Focus Center Research  ... 
doi:10.1145/1837274.1837280 dblp:conf/dac/MitraSN10 fatcat:hwycqj5eljfxbnszwn3zn5yjmy

Bridging pre- and post-silicon debugging with BiPeD

Andrew DeOrio, Jialin Li, Valeria Bertacco
2012 Proceedings of the International Conference on Computer-Aided Design - ICCAD '12  
Furthermore, pre-silicon verification and post-silicon validation methodologies are very different and share little information between them.  ...  In post-silicon, this knowledge is used to detect errors by means of a reconfigurable hardware unit.  ...  Post-silicon validation operates at full speed on early silicon prototypes, but is plagued by the difficulty of observing internal signals.  ... 
doi:10.1145/2429384.2429403 dblp:conf/iccad/DeOrioLB12 fatcat:cdunae6j6rbspgiqi4rj2pcqzi

Intel's Post Silicon functional validation approach

Bojan Tommy, Frumkin Igor, Mauri Robert
2007 2007 IEEE International High Level Design Validation and Test Workshop  
Post silicon validation is the final process in semiconductor chip manufacturing. Functional Validation (FV) is one among many methods used in post silicon validation.  ...  In this paper we tried to explain how this post silicon functional validation is performed in the industry level.  ...  Threadmill: A post-silicon and Hishm Ashraf of STMicroelectronics for their exerciser for multi-threaded processors. InDesign immense contribution to this paper.  ... 
doi:10.1109/hldvt.2007.4392786 dblp:conf/hldvt/BojanFM07 fatcat:ygexaxoke5fwtl756u6jq4eulu

On Reusing Test Access Mechanisms for Debug Data Transfer in SoC Post-Silicon Validation

Xiao Liu, Qiang Xu
2008 2008 17th Asian Test Symposium  
One of the main difficulties in post-silicon validation is the limited debug access bandwidth to internal signals.  ...  In this paper, we propose to reuse these precious TAM resources for real-time debug data transfer in post-silicon validation.  ...  Rather, it is similar to the strategy to reuse scan chains to "dump" data in post-silicon validation.  ... 
doi:10.1109/ats.2008.83 dblp:conf/ats/LiuX08 fatcat:kgpiuchbf5bf5dtmp5uolxacye

Constrained signal selection for post-silicon validation

Kanad Basu, Prabhat Mishra, Priyadarsan Patra
2012 2012 IEEE International High Level Design Validation and Test Workshop (HLDVT)  
Limited signal observability is a major concern during post-silicon validation. On-chip trace buffers store a small number of signal states every cycle.  ...  Existing signal selection techniques are designed to select a set of signals based on the trace buffer width.  ...  INTRODUCTION Post-silicon validation is widely acknowledged as an important challenge in designing modern microprocessors and System-on-Chip (SoC) designs.  ... 
doi:10.1109/hldvt.2012.6418245 dblp:conf/hldvt/BasuMP12 fatcat:55avdiczozhi5hjcivugo3f4em

Observability-aware Directed Test Generation for Soft Errors and Crosstalk Faults

Kanad Basu, Prabhat Mishra, Priyadarsan Patra
2013 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems  
Post-silicon validation has emerged as an important component of any chip design methodology to detect both functional and electrical errors that have escaped the pre-silicon validation phase.  ...  In this paper, we explore the synergy between trace signal selection and observability-aware test generation to enable efficient detection of electrical errors including soft errors and crosstalk faults  ...  Post-silicon validation is used to capture these bugs. An overview of post-silicon validation is shown in Figure 1 . A small set of signals are traced during execution.  ... 
doi:10.1109/vlsid.2013.203 dblp:conf/vlsid/BasuMP13 fatcat:rq7drc5ctnfsjaj3mreqoiliai

E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods [chapter]

Eshan Singh, Clark Barrett, Subhasish Mitra
2017 Lecture Notes in Computer Science  
During post-silicon validation, manufactured integrated circuits are extensively tested in actual system environments to detect design bugs.  ...  We present E-QED, a new approach that automatically localizes electrical bugs during post-silicon validation.  ...  post-silicon validation test to a specific design block.  ... 
doi:10.1007/978-3-319-63390-9_6 fatcat:uo3imhrntzhwxm4hg3yilkxm7i

Efficient trace signal selection using augmentation and ILP techniques

Kamran Rahmani, Prabhat Mishra, Sandip Ray
2014 Fifteenth International Symposium on Quality Electronic Design  
A key problem in post-silicon validation is to identify a small set of traceable signals that are effective for debug during silicon execution.  ...  Most signal selection techniques rely on a metric based on circuit structure. Simulation-based signal selection is promising but have major drawbacks in computation overhead and restoration quality.  ...  Figure 1 : 1 Simplified overview of post-silicon validation flow and role of trace signal selection.  ... 
doi:10.1109/isqed.2014.6783318 dblp:conf/isqed/RahmaniMR14 fatcat:s4k4medfqjdutbypabqdo2s4gm

Efficient Trace Signal Selection for Post Silicon Validation and Debug

K Basu, P Mishra
2011 2011 24th Internatioal Conference on VLSI Design  
Post-silicon validation is an essential part of modern integrated circuit design to capture bugs and design errors that escape pre-silicon validation phase.  ...  Storage requirements limit the number of signals that can be traced; therefore, a major challenge is how to reconstruct the majority of the remaining signals based on traced values.  ...  During post-silicon validation, a set of input tests are used, and the values of the selected signals are stored in a trace buffer.  ... 
doi:10.1109/vlsid.2011.14 dblp:conf/vlsid/BasuM11 fatcat:6ikf3djpw5gwrpnymiwbe5rizm
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