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An Efficient Parallel Algorithm for the General Planar Monotone Circuit Value Problem

1996
*
SIAM journal on computing (Print)
*

A

doi:10.1137/s0097539793260775
fatcat:ey6lxizbtveapgynjtgfxtw5ti
*planar**monotone**circuit*PMC is a Boolean*circuit*that can be embedded in the plane and that contains only AND and OR gates. ... Yang, and more recently, Delcher & Kosaraju have given NC algorithms for the general*planar**monotone**circuit*value problem. ... A*planar**monotone**circuit*PMC is a Boolean*circuit*that is both*planar*and*monotone*. ...##
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On monotone planar circuits

*
Proceedings. Fourteenth Annual IEEE Conference on Computational Complexity (Formerly: Structure in Complexity Theory Conference) (Cat.No.99CB36317)
*

We show that for

doi:10.1109/ccc.1999.766259
dblp:conf/coco/BarringtonLMS99
fatcat:7wpm3dmlcbgd3dxg3bpt6b366y
*monotone**planar**circuits*, with inputs*on*the outer face only, excessive depth compared to width is useless; any function computed by a*monotone**planar**circuit*of width w with inputs*on*... In this paper we show several results about*monotone**planar**circuits*. ... Our second result concerns*monotone**planar**circuits*with no restriction*on*width. However, we restrict the inputs of the*circuit*to appear*on*the outer face of the*circuit*only. ...##
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Evaluating Monotone Circuits on Cylinders, Planes and Tori
[chapter]

2006
*
Lecture Notes in Computer Science
*

We show that stratified cylindrical

doi:10.1007/11672142_54
fatcat:ibvyzw5mybdujfjmpffhyyxwau
*monotone**circuits*can be evaluated in LogDCFL, arbitrary cylindrical*monotone**circuits*can be evaluated in AC 1 (LogDCFL), while*monotone**circuits*with*one*-input-face ... We re-examine the complexity of evaluating*monotone**planar**circuits*MPCVP, with special attention to*circuits*with cylindrical embeddings. ... Lemma 19 A*monotone**circuit*C with a toroidal embedding can be converted in log space to an equivalent*monotone**circuit*C with a*planar*embedding. ...##
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Upper Bounds for Monotone Planar Circuit Value and Variants

2009
*
Computational Complexity
*

We show that stratified cylindrical

doi:10.1007/s00037-009-0265-5
fatcat:hndutfgn7bbqnh436inlt2n7da
*monotone**circuits*can be evaluated in LogDCFL, and arbitrary cylindrical*monotone**circuits*can be evaluated in AC 1 (LogDCFL), while*monotone**circuits*with*one*-input-face ... We also show that*planar*non-*monotone**circuits*with polylogarithmic negation-height can be evaluated in NC. ... We also consider*planar*non-*monotone**circuits*with restrictions*on*the placement of negation gates, in Section 6.3, and show that such*circuits*too can be evaluated in NC. ...##
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Page 6765 of Mathematical Reviews Vol. , Issue 88m
[page]

1988
*
Mathematical Reviews
*

But

*one*can also conclude that only a negligible fraction of all*monotone*functions can be computed by*monotone**planar**circuits*. ... Furthermore, it can be shown that functions which are*monotone**planar*computable are computable by*monotone**planar**circuits*with not more than n*/6+ O(n?) gates. ...##
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An efficient parallel algorithm for the layered planar monotone circuit value problem
[chapter]

1993
*
Lecture Notes in Computer Science
*

A

doi:10.1007/3-540-57273-2_67
fatcat:olzthzlmhrevhgpdsgj6tognke
*planar**monotone**circuit*(PMC) is a Boolean*circuit*that can be embedded in the plane and that contains only AND and OR gates. ... In this paper, we give an efficient parallel algorithm that evaluates a layered PMC of size n in O(log 2 n) time using only a linear number of processors*on*an EREW PRAM. ...*One*interesting special case of CVP is the*planar**monotone**circuit*value problem (PMCVP). ...##
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Planar acyclic computation

1991
*
Information and Computation
*

there exists a

doi:10.1016/0890-5401(91)90003-k
fatcat:zx2cekyslremfe43wyj5ujqxg4
*planar*acyclic*circuit*which realizes the specification. ... An algorithm is given which produces such a*circuit*whenever*one*exists. ...*planar**monotone**circuit*. ...##
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One-Input-Face MPCVP Is Hard for L, But in LogDCFL
[chapter]

2006
*
Lecture Notes in Computer Science
*

Yang showed that the

doi:10.1007/11944836_8
fatcat:gbhs5d6qdjgmnk5xmerzdy4eoy
*one*-input-face*monotone**planar**circuit*value problem (MPCVP) is in NC 2 , and Limaye et. al. improved the bound to LogCFL. ... A*monotone**planar**circuit*(MPC) is a Boolean*circuit*that can be embedded in a plane, and that has only AND and OR gates. ... Acknowledgement We thank Nutan Limaye and Meena Mahajan for valuable discussions*on*the subject. ...##
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Hard Tiling Problems with Simple Tiles
[article]

2000
*
arXiv
*
pre-print

In the process, we show that

arXiv:math/0003039v1
fatcat:5yb33bdoozfdtlzczvwgw35mpa
*Monotone*1-in-3 Satisfiability is NP-complete for*planar*cubic graphs. ... In higher dimensions, we show NP-completeness for the domino and straight tromino for general regions*on*the cubic lattice, and for simply-connected regions*on*the four-dimensional hypercubic lattice. ... While*planar**circuits*and*monotone**circuits*can both simulate Boolean*circuits*in general [14] ,*circuits*which are both*planar*and*monotone*cannot. ...##
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LTL Path Checking Is Efficiently Parallelizable
[chapter]

2009
*
Lecture Notes in Computer Science
*

Our approach is inspired by work in the related area of evaluating

doi:10.1007/978-3-642-02930-1_20
fatcat:atoqrzx5bjea3o3pe2svjfjv4a
*monotone*Boolean*circuits*[11, 9, 15, 3, 17, 5] . ... Figure 1 shows such a*circuit*for the formula ((a U b) U (c U d)) U e and a path of length 5. ... The problem of evaluating*monotone**planar**circuits*has been studied extensively in the literature. ...##
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On the Complexity of Temporal-Logic Path Checking
[article]

2014
*
arXiv
*
pre-print

entail more efficient evaluation algorithms than are known for a certain class of

arXiv:1312.7603v3
fatcat:q747ukha3jdzperqd2kpfkjt2i
*planar**circuits*. ... We then establish a connection between LTL path checking and*planar**circuits*, which we exploit to show that any further progress in determining the precise complexity of LTL path checking would immediately ... Note that, due to*planarity*of the underlying*circuit*, each α i,j depends*on*the consecutive block of gates*one*layer below and that α i,j and α i,j+1 share at most*one*predecessor. k i,j−1 < k i,j Note ...##
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On the Complexity of Temporal-Logic Path Checking
[chapter]

2014
*
Lecture Notes in Computer Science
*

entail more efficient evaluation algorithms than are known for a certain class of

doi:10.1007/978-3-662-43951-7_8
fatcat:jg4hpvwhd5cbld4bfy6u22ixre
*planar**circuits*. ... We then establish a connection between LTL path checking and*planar**circuits*, which we exploit to show that any further progress in determining the precise complexity of LTL path checking would immediately ... Note that, due to*planarity*of the underlying*circuit*, each α i,j depends*on*the consecutive block of gates*one*layer below and that α i,j and α i,j+1 share at most*one*predecessor. k i,j−1 < k i,j Note ...##
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Constant Width Planar Computation Characterizes ACC0
[chapter]

2004
*
Lecture Notes in Computer Science
*

We obtain a characterization of ACC 0 in terms of a natural class of constant width

doi:10.1007/978-3-540-24749-4_5
fatcat:u6elvmpksrdi5fjg6taago7qu4
*circuits*, namely in terms of constant width polynomial size*planar**circuits*. ... This is shown via a characterization of the class of acyclic digraphs which can be embedded*on*a cylinder surface in such a way that all arcs flow along the same direction of the axis of the cylinder. ... Now consider a*planar**circuit*C*on*n inputs of size p(n) and width w. ...##
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Efficient Parallel Path Checking for Linear-Time Temporal Logic With Past and Bounds

2012
*
Logical Methods in Computer Science
*

Theorem 3.1) for evaluating

doi:10.2168/lmcs-8(4:10)2012
fatcat:eabc7iq4mvhwlfky7byt4xcdji
*monotone*Boolean*planar**circuits*with all constant gates*on*the outer face. The*circuits*that appear in our construction actually exhibit much more structure. ... Note that an evaluated*planar**circuit*with all variable gates*on*the outer face is*one*-input-face. The evaluation of*one*-input-face*planar**circuits*can be parallelized efficiently. ...##
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Hard Tiling Problems with Simple Tiles

2001
*
Discrete & Computational Geometry
*

In the process we show that

doi:10.1007/s00454-001-0047-6
fatcat:shs6azzbz5f2nkoljy262d4ulq
*Monotone*1-in-3 Satisfiability is NP-complete for*planar*cubic graphs. ... In higher dimensions we show NP-completeness for the domino and straight tromino for general regions*on*the cubic lattice, and for simply connected regions*on*the four-dimensional hypercubic lattice. ... While*planar**circuits*and*monotone**circuits*can both simulate Boolean*circuits*in general [14] ,*circuits*which are both*planar*and*monotone*cannot. ...
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