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On Implementable Timed Automata [chapter]

Sergio Feo-Arenis, Milan Vujinović, Bernd Westphal
2020 Lecture Notes in Computer Science  
We characterise a set of implementable timed automata models and provide a translation to a timed while language.  ...  generate additional code for a global scheduler which implements the timed automata semantics.  ...  Implementable Timed Automata In the following, we introduce implementable timed automata that can be seen as a definition of a sub-language of timed automata as recalled in Sect. 2.  ... 
doi:10.1007/978-3-030-50086-3_5 fatcat:ctr33lseundhfjxlzn6t73rboa

Implementing Timed Automata Specifications: The "Sandwich" Approach

Raymond Devillers, Jean-Yves Didier, Hanna Klaudel
2013 2013 13th International Conference on Application of Concurrency to System Design  
From a highly distributed timed automata specification, the paper analyses an implementation in the form of a looping controller, launching possibly many tasks in each cycle.  ...  Qualitative and quantitative constraints are distinguished on the specification to allow such an implementation, and the analysis of the semantic differences between the specification and the implementation  ...  Illustration on the running example In order to apply our sandwich methodology on the running example, we defined the following timed automata specifications from the original one (see A in Fig. 1 ):  ... 
doi:10.1109/acsd.2013.26 dblp:conf/acsd/DevillersDK13 fatcat:3xl62t6uhrbmnhhkakla7bcpqi

Linear-Time Model Checking: Automata Theory in Practice [chapter]

Moshe Y. Vardi
Implementation and Application of Automata  
Both explicit and symbolic implementations, such as SPIN and and SMV, are widely used.  ...  In automata-theoretic model checking we compose the design under verification with a Büchi automaton that accepts traces violating the specification.  ...  The type of finite automata on infinite words we consider is the one defined by Büchi [4] .  ... 
doi:10.1007/978-3-540-76336-9_2 dblp:conf/wia/Vardi07 fatcat:hve4shw5m5etnia76sn7uipesi

The Implementation Of Cellular Automata With Non-identical Rule On Serial Base

Nazanin Moarefi, Ali Yarahmadi
2012 Journal of Mathematics and Computer Science  
Different methods can be used to implement cellular automata, among which the implementation of cellular automata on serial bases is one of the simplest ones.  ...  Two types of implementing cellular automata on a serial base were studied in this paper.  ...  In this paper, implementing cellular automata on the serial base was examined.  ... 
doi:10.22436/jmcs.04.02.16 fatcat:y4tole74afcwloff7wuyjvve4u

Cryptographic Key Exchange Protocol with Message Authentication Codes (MAC) Using Finite State Machine

Mohd Anuar Mat Isa, Miza Mumtaz Ahmad, Nor Fazlida Mohd Sani, Habibah Hashim, Ramlan Mahmod
2014 Procedia Computer Science  
We have shown that the cryptographic MAC protocol for key exchange protocol can be implemented using finite input-output automata with some small modification of the finite state machine.  ...  The proposed protocol would be useful for implementation in a lightweight or a secure smart devices communication in the wireless sensor nodes (WSN) network.  ...  The proposed protocol is implemented in stream cipher using one-dimensional N cells of cellular automata.  ... 
doi:10.1016/j.procs.2014.11.061 fatcat:nx6wknnztzcqrl6hhskyp5frxu

Testing of Hybrid Real-time Systems Using FPGA Platform

Jan Krakora, Zdenek Hanzalek
2006 2006 International Symposium on Industrial Embedded Systems  
This paper presents a hybrid Hardware-in-the-Loop (HIL) methodology based on both the discrete event system, given by timed automata, and the continuous systems, given by difference equations.  ...  The methodology is implemented using an FPGA platform. It guaranties not only the speed enhancement but also the time accuracy and extensibility with no performance loss.  ...  Timed automata implementation Our timed automata implementation is inspired by [7] . The paper shows the transformation of timed automata into a program.  ... 
doi:10.1109/ies.2006.357472 dblp:conf/sies/KrakoraH06 fatcat:tplrkjnpvncsnlccfsgczb663y

Robustness in Timed Automata [chapter]

Patricia Bouyer, Nicolas Markey, Ocan Sankur
2013 Lecture Notes in Computer Science  
We will concentrate on robustness against timing errors which can be due to measuring errors, imprecise clocks, and unexpected runtime behaviors such as execution times that are longer or shorter than  ...  In this paper we survey several approaches to the robustness of timed automata, that is, the ability of a system to resist to slight perturbations or errors.  ...  Methodology The above theorem allows one to completely separate design and implementation of timed automata models.  ... 
doi:10.1007/978-3-642-41036-9_1 fatcat:i2otw7n7bbhl7gcvmgcpevkufm

Rabinizer 4: From LTL to Your Favourite Deterministic Automaton [chapter]

Jan Křetínský, Tobias Meggendorfer, Salomon Sickert, Christopher Ziegler
2018 Lecture Notes in Computer Science  
Finally, we evaluate the performance and in cases with any previous implementations we show enhancements both in terms of the size of the automata and the computational time, due to algorithmic as well  ...  as implementation improvements.  ...  utilize and thus improve performance on this family both in terms of size and time. ltl2ldba This translation is based on breakpoints for subformulae of the form Gψ. = x1 ∧ φ1, ψ2 = (x1 ∧ φ1) ∨ (¬x1 ∧  ... 
doi:10.1007/978-3-319-96145-3_30 fatcat:kowgdythzrc7teuvv5csf7xbeq

Robust Controller Synthesis in Timed Automata [chapter]

Ocan Sankur, Patricia Bouyer, Nicolas Markey, Pierre-Alain Reynier
2013 Lecture Notes in Computer Science  
Goal: Revisit Büchi acceptance for timed automata and suggest a robust alternative: only accept realizable strategies, avoid convergent ones.  ...  Reachability in Timed Automata Runs of timed automata can be characterized by runs visiting only the vertices of regions. given the topological closure of the guards.  ... 
doi:10.1007/978-3-642-40184-8_38 fatcat:2x2iedlzgzf6zk2r4aqx2ok6te

Moby/plc — A design tool for hierarchical real-time automata [chapter]

Josef Tapken
1998 Lecture Notes in Computer Science  
MOBY/PLC is a graphical design tool for PLC-Automata, a special class of hierarchical real-time automata suitable for the description of distributed real-time systems.  ...  Besides the modelling language in use and some features of MOBY/PLC, like several validation methods and code generation, the implementational basis which is built up by the C++ class library MCL is sketched  ...  O1derog, and the other members of the "semantics group" in Oldenburg for fruitful discussions on the subject of this paper.  ... 
doi:10.1007/bfb0053601 fatcat:adiptmguhfctpglkwgfjpymuwa

Symbolic Reachability Analysis of Probabilistic Linear Hybrid Automata

Y. MUTSUDA
2005 IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences  
Moreover, they are distributed and real-time systems. Therefore, it is important to specify and verify randomness and soft real-time properties.  ...  It can describe uncertainties and soft real-time characteristics.  ...  We have implemented a prototype of verifier based on MATHEMATICA.  ... 
doi:10.1093/ietfec/e88-a.11.2972 fatcat:tok2g4ebincititpg4jwfqvumu

Safety-Assured Formal Model-Driven Design of the Multifunction Vehicle Bus Controller [chapter]

Yu Jiang, Han Liu, Houbing Song, Hui Kong, Ming Gu, Jiaguang Sun, Lui Sha
2016 Lecture Notes in Computer Science  
With the help of Uppaal, we check and debug whether the timed automata satisfy the formulas or not.  ...  In this paper, we present a formal model-driven engineering approach to establishing a safety-assured implementation of Multifunction vehicle bus controller (MVBC) based on the generic reference models  ...  We formalize them as timed computation tree logic formulas defined on the formal timed automata, and verify them in Uppaal.  ... 
doi:10.1007/978-3-319-48989-6_47 fatcat:5whqnf6ewjecjbcg4nsk7ajr3q

TaPAS: The Talence Presburger Arithmetic Suite [chapter]

Jérôme Leroux, Gérald Point
2009 Lecture Notes in Computer Science  
, and (3) the very first implementation of an algorithm decoding automata to Presburger formulae.  ...  The suite provides (1) the application programming interface GENEPI for this logic with encapsulations of many classical solvers, (2) the BDD-like library SATAF used for encoding Presburger formulae to automata  ...  Up to our knowledge, no other automata package implements these features.  ... 
doi:10.1007/978-3-642-00768-2_18 fatcat:anqigt4kpjauxeztbi2xmvekwu

FPGA based tester tool for hybrid real-time systems

Jan Krákora, Zdeněk Hanzálek
2008 Microprocessors and microsystems  
We have focused on the implementation of a discrete event system, specifically timed automata into FPGA, and we have linked them with continuous systems implemented as filters in fixed point arithmetic  ...  This paper presents a design methodology for a hybrid Hardwarein-the-Loop (HIL) tester tool, based on both discrete event system theory, given by timed automata, and continuous systems theory, given by  ...  Timed automata implementation Our timed automata implementation is inspired by [2] . The paper shows the transformation of timed automata into a program.  ... 
doi:10.1016/j.micpro.2008.07.003 fatcat:eon56z7qnbdxbl45anv6f33wti

Design and optimization of multi-clocked embedded systems using formal technique

Yu Jiang, Zonghui Li, Hehua Zhang, Yangdong Deng, Xiaoyu Song, Ming Gu, Jiaguang Sun
2013 Proceedings of the 2013 9th Joint Meeting on Foundations of Software Engineering - ESEC/FSE 2013  
In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multiclock embedded systems.  ...  The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model.  ...  Some main time-critical functions are implemented by VHDL module running on the FPGA processor, and the and other functions are implemented by C code running on the ARM processor.  ... 
doi:10.1145/2491411.2494575 dblp:conf/sigsoft/JiangLZDSGS13 fatcat:lykrbprubbcu5owdnufjeoervy
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