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Object-oriented technology transfer to multiprocessor system-level synthesis

Pan-Ann Hsiung, Trong-Yen Lee, Sao-Jie Chen
Proceedings. Technology of Object-Oriented Languages. TOOLS 24 (Cat. No.97TB100240)  
The work presented in this paper extends the basic application of object-oriented technology to system-level synthesis such that not only system modeling uses object-oriented technology, but the synthesis  ...  Object-oriented technology from software engineering is one such successful transfer to hardware design. There is a natural correspondence between object-oriented concepts and hardware design.  ...  Conclusion and Future Work The intuitive correspondence between object-oriented technology in software engineering and hardware design in system-level synthesis was discussed, explored, and realized in  ... 
doi:10.1109/tools.1997.713555 dblp:conf/tools/HsiungLC97 fatcat:roe5677awzcgvgdlytohyvolau

ICOS: an intelligent concurrent object-oriented synthesis methodology for multiprocessor systems

Pao-Ann Hsiung, Chung-Hwang Chen, Trong-Yen Lee, Sao-Jie Chen
1998 ACM Transactions on Design Automation of Electronic Systems  
The methodology proposed here, called Intelligent Concurrent Object-Oriented Synthesis (ICOS) methodology, makes feasible the synthesis of complex multiprocessor systems through the application of several  ...  ICOS is based on Performance Synthesis Methodology (PSM), a recently proposed objectoriented system-level design methodology.  ...  Corresponding to the levels of design details, we have different levels of synthesis, such as logic level, register-transfer level (RTL), algorithmic or high level, and system level.  ... 
doi:10.1145/290833.290834 fatcat:3cniyiixazhqjc3m7oye5bomhu

Multi-processor system design with ESPAM

Hristo Nikolov, Todor Stefanov, Ed Deprettere
2006 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis - CODES+ISSS '06  
ESPAM moves the design specification from RTL to a higher, so called system level of abstraction.  ...  Unfortunately, most of the current design methodologies and tools are based on Register Transfer Level (RTL) descriptions, mostly created by hand.  ...  The main objective of this experiment is to show that our design flow successfully closes the implementation gap between the System and RTL abstraction levels of description as well as to show that using  ... 
doi:10.1145/1176254.1176306 dblp:conf/codes/NikolovSD06 fatcat:qtpcslilh5fwrd55l6jis2xngy

POSE: a parallel object-oriented synthesis environment

Pao-Ann Hsiung
2001 ACM Transactions on Design Automation of Electronic Systems  
POSE can be applied especially to system-level synthesis, whose targets can be parallel computer architectures, systems-on-chip, or embedded systems.  ...  System parts are modeled using the popular object-oriented modeling technique and are dynamically manipulated using the parallel design technique.  ...  With the increasing wide-spread use of object-oriented technology in software modeling and development, there has been a technology transfer from software to hardware [Brooks et al. 1984; Gross 1985;  ... 
doi:10.1145/371254.371263 fatcat:x2tilk6id5ctliabwwspmdkvoi

Affinity-driven system design exploration for heterogeneous multiprocessor SoC

C. Brandolese, W. Fornaciari, L. Pomante, F. Salice, D. Sciuto
2006 IEEE transactions on computers  
This paper addresses this type of problem by proposing a design flow supporting the system-level design of heterogeneous multiprocessor system-on-chip (MP-SoC), by extracting information from the system  ...  Continuous advances in silicon technology enable the development of complex System-on-Chip as cooperation among Digital Signal Processors (DPSs), General Purpose Processors (GPPs), and specific hardware  ...  Finally, the work in [4] considers multiprocessor systems synthesis, starting from an object-oriented specification, and it analyzes subsets of such a specification in order to detect features that allow  ... 
doi:10.1109/tc.2006.66 fatcat:paavnhthqrh2vj3lywailaltlm

Synthesis Algorithm for Application-Specific Homogeneous Processor Networks

J. Cong, K. Gururaj, Guoling Han, Wei Jiang
2009 IEEE Transactions on Very Large Scale Integration (vlsi) Systems  
This paper addresses the problem of synthesizing an application-specific multiprocessor system for stream-oriented embedded applications to minimize system latency under the throughput constraint.  ...  We employ a novel framework for this problem, similar to that of technology mapping in the logic synthesis domain, and develop a set of efficient algorithms, including labeling and clustering for efficient  ...  His research interests include CAD of VLSI circuits and systems, design and synthesis of system-on-a-chip, programmable systems, novel computer architectures, nanosystems, and highly scalable algorithms  ... 
doi:10.1109/tvlsi.2008.2004874 fatcat:ujsw4vlcwvbahnuqggrq3xzw3e

Augmenting Platform-Based Design with Synthesis Tools

Yuan Xie, Jiang Xu, Wayne Wolf
2003 Journal of Circuits, Systems and Computers  
Distributed system co-synthesis does not use an architectural template to drive co-synthesis. Instead, it creates a multiprocessor architecture for the hardware engine.  ...  Modeling languages and simulation systems allow system designs to be described at a relatively high level of detail.  ...  Finally, the design can be exported to a co-verification tool and other tools to finish synthesis and object code generation.  ... 
doi:10.1142/s0218126603000702 fatcat:wvpai74bgjgjzppzmj7r3hzyfe

Real-time operating systems for embedded computing

Serge Hustin, Miodrag Potkonjak, Eric Verhulst, Wayne Wolf
1998 Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design - ICCAD '98  
RTOS: the backbone of new system-level design process  ...  We survey the state-of-the-art in real-time operating systems (RTOSs) from the system synthesis point of view.  ...  There has been also efforts to ensure satisfaction of real-time constraints in object oriented CORBA, an important first step in development of real-time large software systems.  ... 
doi:10.1145/288548.289349 dblp:conf/iccad/HustinPVW98 fatcat:6hg6lnw3x5fhxptftany74qgam

Application Specific Customization and Scalability of Soft Multiprocessors

Deepak Unnikrishnan, Jia Zhao, Russell Tessier
2009 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines  
The derived KPN specification is given as input to the embedded system-level platform synthesis and application mapping (ESPAM) tool, as shown in Figure 2 .  ...  This approach uses automated network topology generation from high-level specifications to generate multiprocessor systems consisting of up to 64 nodes.  ... 
doi:10.1109/fccm.2009.41 dblp:conf/fccm/UnnikrishnanZT09 fatcat:7cjy7ltl4rcyzlo7e2p4hdecdq

System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors

Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
2006 2006 International Conference on Computer Design  
In this paper, we propose a system-level energy estimation model to accompany our design methodology for HERA (HEterogeneous Reconfigurable Architecture), a versatile reconfigurable MPoPC that we have  ...  Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design.  ...  Also, different application-system pairs may have different performance-energy objectives. To this extent, the PHCL contains diverse FU types for system synthesis. III.  ... 
doi:10.1109/iccd.2006.4380849 dblp:conf/iccd/WangZ06 fatcat:fkrzscizefc6rj6enuocn52qse

Systematic and Automated Multiprocessor System Design, Programming, and Implementation

H. Nikolov, T. Stefanov, E. Deprettere
2008 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
ESPAM moves the design specification and programming from the Register Transfer Level and low-level C to a higher system level of abstraction.  ...  As an efficient solution to these two problems, in this paper, we present the methodology and techniques implemented in a tool called Embedded System-level Platform synthesis and Application Mapping (ESPAM  ...  The Task Transaction Level (TTL) interface presented in [20] is a design technology for the programming of embedded multiprocessor systems.  ... 
doi:10.1109/tcad.2007.911337 fatcat:akppsyu3szgdpg6yp4tb32ra7e

Multiprocessor System-on-Chip (MPSoC) Technology

W. Wolf, A.A. Jerraya, G. Martin
2008 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The multiprocessor system-on-chip (MPSoC) uses multiple CPUs along with other hardware subsystems to implement a system. A wide range of MPSoC architectures have been developed over the past decade.  ...  We consider some of the technological trends that have driven the design of MPSoCs. We also survey computer-aided design problems relevant to the design of MPSoCs.  ...  ACKNOWLEDGMENT The authors would like to thank B. Ackland and S. Dutta for the helpful discussions of their MPSoCs.  ... 
doi:10.1109/tcad.2008.923415 fatcat:p37pvh5iezfdjd4acepney4zmy

CMAPS: a cosynthesis methodology for application-oriented parallel systems

Pao-Ann Hsiung
2000 ACM Transactions on Design Automation of Electronic Systems  
This is known as system-level cosynthesis of application-oriented general-purpose parallel systems for which a novel methodology called Cosynthesis Methodology for Application-Oriented Parallel Systems  ...  Besides going from specification to design, one of our main objectives is to show how an application problem can be transformed into specifications.  ...  Synthesis Methodology (PSM) [Hsiung et al. 1996] , a system-level object-oriented hardware synthesis methodology for multiprocessor systems.  ... 
doi:10.1145/329458.329465 fatcat:ykzzqjjnurczzhzzp4eatc5q4q

A system design methodology for software/hardware co-development of telecommunication network applications

Bill Lin
1996 Proceedings of the 33rd annual conference on Design automation conference - DAC '96  
The aim of this methodology is to provide an integrated design flow from system specification to implementation.  ...  In this paper, we describe a system design methodology for the concurrent development of hybrid software/hardware systems for telecom network applications.  ...  The author would like to thank M. Genoe, G. Van Wauwe, E. Huyskens, and L. Cloetens from Alcatel-Bell for their contributions and support in this project.  ... 
doi:10.1145/240518.240645 dblp:conf/dac/Lin96 fatcat:w24c7kebvbethlpvtl2mdggega

Design, Synthesis, and Test of Networks on Chips

P.P. Pande, C. Grecu, A. Ivanov, R. Saleh, G. De Micheli
2005 IEEE Design & Test of Computers  
OCCN defines a universal API and an object-oriented C++ library built atop SystemC. Network emulation by FPGAs is another way to validate specific switch and network-interface implementations.  ...  Designers have used the libraries and tools to realize experimental gate-level models of complex system applications.  ... 
doi:10.1109/mdt.2005.108 fatcat:ftg32fzp2jelppgskbqb34ehiy
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