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NOC-Out: Microarchitecting a Scale-Out Processor

Pejman Lotfi-Kamran, Boris Grot, Babak Falsafi
2012 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture  
Many-core processors with a mesh interconnect sacrifice performance on scale-out workloads due to NOC-induced delays.  ...  A detailed evaluation targeting a 64-core CMP and a set of scale-out workloads reveals that NOC-Out improves system performance by 17% and reduces network area by 28% over a tiled mesh-based design.  ...  NOC-Out NOC-Out is a processor organization optimized for the bilateral access pattern dominant in scale-out workloads.  ... 
doi:10.1109/micro.2012.25 dblp:conf/micro/Lotfi-KamranGF12 fatcat:na6jo5e3anbpvgxob4jdh767cq

Scale-Out Processors

Pejman Lotfi Kamran
If it were not for the joy of working on such an extraordinary research project, I would have left the Ph.D. program years ago when I faced, for the first time, the difficulties and pains of being a Ph.D  ...  NOC-Out: Microarchitecting a Scale-Out Processor NOC-Out is not the first attempt to optimize the on-chip interconnect for a specific workload domain.  ...  In Chapter 3, we introduce the scale-out design methodology and quantify its benefits. In Chapter 4, we microarchitect a Scale-Out Processor to minimize the area cost and maximize the performance.  ... 
doi:10.5075/epfl-thesis-5906 fatcat:v5kwfjeitjedvamyeg4kwyua7i