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A survey of cross-layer power-reliability tradeoffs in multi and many core systems-on-chip
2013
Microprocessors and microsystems
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Today, designers must consider building systems that achieve the requisite functionality and performance using components that may be unreliable. ...
As systems-on-chip increase in complexity, the underlying technology presents us with significant challenges due to increased power consumption as well as decreased reliability. ...
One way to overcome these errors, especially in mission-critical systems, is to first use classic triple-modular redundancy (TMR) to identify the errors, and then use full or partial dynamic reconfiguration ...
doi:10.1016/j.micpro.2013.07.008
fatcat:bl2v6dfvxnfxnble4pkcg2pcw4
SMCV: a Methodology for Detecting Transient Faults in Multicore Clusters
2012
CLEI Electronic Journal
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to other processes and leveraging the intrinsic hardware redundancy of the multicore. ...
, which is a fully distributed technique that provides fault detection for message-passing parallel applications, by validating the contents of the messages to be sent, preventing the transmission of errors ...
Correcting Code 2 HPC: High Performance Computing 3 DMR: Dual Modular Redundancy of a multicore cluster. ...
doi:10.19153/cleiej.15.3.5
fatcat:hhkz5ro275b7viszgynbvalwte
DUAL: Reliability-Aware Power Management in Data Centers
2013
2013 13th IEEE/ACM International Symposium on Cluster, Cloud, and Grid Computing
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However, DVFS can potentially decrease the system reliability -the processors at low voltages are more likely to encounter soft errors that may result in VM or system crashes. ...
The framework is designed to balance the dual needs of a data center: reducing energy consumption and providing high reliability. ...
Soft Errors: The impact of DVFS on soft error rate in processors has been studied, for example, [4] designs a dual modular redundancy (DMR) technique to stabilize the SER in multicore processors, but ...
doi:10.1109/ccgrid.2013.82
dblp:conf/ccgrid/XuTMH13
fatcat:tkrrik4xsvb6th62fgomc65724
Reliability-Aware Resource Management in Multi-/Many-Core Systems: A Perspective Paper
2021
Journal of Low Power Electronics and Applications
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This feature size scaling, along with architectural innovations, has dramatically exacerbated the rate of manufacturing defects and physical fault-rates. ...
We first present an overview of reliability in electronic systems, associated fault models and the various system models used in related research. ...
In on-demand redundancy, three types of Dual Modular Redundancy, Triple Modular Redundancy, and Passive Replication are supported. ...
doi:10.3390/jlpea11010007
fatcat:uvzwnfrprne7lbd2fg2goh3v2q
Adapting to intermittent faults in multicore systems
2008
SIGPLAN notices
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Future multicore processors will become more susceptible to a variety of hardware failures. ...
To remedy these and other drawbacks of current techniques, we propose using a thin hardware/firmware layer to manage an overcommitted systemone where the OS is configured to use more virtual processors ...
The use of Dual-Modular Redundancy (DMR), or triple redundancy (TMR), as a detection and recovery mechanism is also be possible. ...
doi:10.1145/1353536.1346314
fatcat:ympxim46hbav7bjdjnj4tdrgpm
Design of Embedded Ai Engine Based on the Microkernel Operating System
2022
Wireless Communications and Mobile Computing
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The user code is used to be in the operating system processor environment; so, it can be used on dual core processor first. ...
it, so that it can give full play to the high performance of the dual-core. ...
Multithreading technology is widely used in DSP chips and XRL multicore and multithread processors introduced by RMI. ...
doi:10.1155/2022/9304019
fatcat:43un4mzc6zd7bmx2ex5m6xcjzu
Adapting to intermittent faults in multicore systems
2008
Proceedings of the 13th international conference on Architectural support for programming languages and operating systems - ASPLOS XIII
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Future multicore processors will become more susceptible to a variety of hardware failures. ...
To remedy these and other drawbacks of current techniques, we propose using a thin hardware/firmware layer to manage an overcommitted systemone where the OS is configured to use more virtual processors ...
The use of Dual-Modular Redundancy (DMR), or triple redundancy (TMR), as a detection and recovery mechanism is also be possible. ...
doi:10.1145/1346281.1346314
dblp:conf/asplos/WellsCS08
fatcat:fxfebpasinhytmfhhw7luiltve
Adapting to intermittent faults in multicore systems
2008
ACM SIGOPS Operating Systems Review
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Future multicore processors will become more susceptible to a variety of hardware failures. ...
To remedy these and other drawbacks of current techniques, we propose using a thin hardware/firmware layer to manage an overcommitted systemone where the OS is configured to use more virtual processors ...
The use of Dual-Modular Redundancy (DMR), or triple redundancy (TMR), as a detection and recovery mechanism is also be possible. ...
doi:10.1145/1353535.1346314
fatcat:adwwrwhrffedpfua3qfgin2ije
Adapting to intermittent faults in multicore systems
2008
SIGARCH Computer Architecture News
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Future multicore processors will become more susceptible to a variety of hardware failures. ...
To remedy these and other drawbacks of current techniques, we propose using a thin hardware/firmware layer to manage an overcommitted systemone where the OS is configured to use more virtual processors ...
The use of Dual-Modular Redundancy (DMR), or triple redundancy (TMR), as a detection and recovery mechanism is also be possible. ...
doi:10.1145/1353534.1346314
fatcat:dr4txyknbjepjeiw7q5zgr7p7i
Reliable Systems on Unreliable Fabrics
2008
IEEE Design & Test of Computers
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It achieves low cost by avoiding traditional mechanisms (such as dual-modular redundancy) that replicate hardware (or computation) to validate results. ...
We can keep repair costs to essentially nothing by utilizing the natural redundancy of instruction-level parallel processors and multicore processors. ...
doi:10.1109/mdt.2008.107
fatcat:ykmurvstufcvrevyigxcyp2qhu
Safepower Project: Architecture For Safe And Power-Efficient Mixed-Criticality Systems
2017
Zenodo
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As a further safety feature, a triple modular redundancy will be implemented for the flight algorithms. ...
Reliability will be achieved by executing redundant applications and using redundant links with the interlocking. ...
doi:10.5281/zenodo.1216870
fatcat:46gbqu45lzct5mhsspuqt5i4wm
2019-2020 Index IEEE Transactions on Industrial Electronics Vol. 67
2020
IEEE transactions on industrial electronics (1982. Print)
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., Hydrothermal Aging Factor Estimation for Two-Cell Diesel-Engine SCR Systems via a Dual Time-Scale Unscented Kalman Filter; TIE Jan. 2020 442-450 Jiang, K., Yan, F., and Zhang, H., Data-Driven Modeling ...
., +, TIE April
2020 2894-2904
A Temperature and Current Rate Adaptive Model for High-Power Lith-
ium-Titanate Batteries Used in Electric Vehicles. ...
., +, TIE July 2020 6010-6018 Simple Stability Enhancement Method for Stator Current Error-Based MRAS-Type Speed Estimator for Induction Motor. ...
doi:10.1109/tie.2020.3045338
fatcat:gljm7ngg3fakvmnfswcbb5vwiu
Dependable embedded systems
2008
2008 6th IEEE International Conference on Industrial Informatics
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Titles in the Series cover a focused set of embedded topics relating to traditional computing devices as well as hightech appliances used in newer, personal devices, and related topics. ...
Adaptive Modular Redundancy (AMR) Adaptive modular redundancy (AMR) enables the dynamic establishment of a redundancy mechanism (dual or triple modular redundancy, DMR/TMR) at runtime for tasks that have ...
An application can be executed with either Dual Modular Redundancy (DMR) or Triple Modular Redundancy (TMR). ...
doi:10.1109/indin.2008.4618103
fatcat:hal6brsgsjg5rlo3u5xil46pxi
2020 Index IEEE Transactions on Systems, Man, and Cybernetics: Systems Vol. 50
2020
IEEE Transactions on Systems, Man & Cybernetics. Systems
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Soft Ratings. ...
Lu, N., +, TSMC Jan. 2020 137-148 Collaborative filtering Integrating Community Context Information Into a Reliably Weighted Col-laborative Filtering System Using Soft Ratings. ...
doi:10.1109/tsmc.2021.3054492
fatcat:zartzom6xvdpbbnkcw7xnsbeqy
A survey of checker architectures
2013
ACM Computing Surveys
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is quickly becoming a primary design constraint for high end processors because of the inherent limits of manufacturability, extreme miniaturization of transistors, and the growing complexity of large multicore ...
MultiMaster Approaches Conceptually, we can either use Dual Modular Redundancy (DMR) to just detect errors, or Triple Modular Redundancy (TMR) to correct them using voting. ...
There are a few classical forward error recovery techniques, which use n-modular redundancy or error checking logic. ...
doi:10.1145/2501654.2501662
fatcat:rmmc2ntqofgkvnbjhwpmekol4i
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