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SPHERE: A Multi-SoC Architecture for Next-generation Cyber-Physical Systems Based on Heterogeneous Platforms

Alessandro Biondi, Daniel Casini, Giorgiomaria Cicero, Niccolo Borgioli, Giorgio Buttazzo, Gaetano Patti, Luca Leonardi, Lucia Lo Bello, Marco Solieri, Paolo Burgio, Ignacio Sanudo, Angelo Ruocco (+5 others)
2021 IEEE Access  
They include isolation mechanisms for mixed-criticality applications, predictable I/O virtualization, the management of time-sensitive networks with heterogeneous traffic flows, and the management of field-programmable  ...  gate arrays (FPGA) to provide efficient implementations for cryptography modules, as well as hardware acceleration for deep neural networks.  ...  SPHERE addresses these challenges by providing a multi-SoC architecture for: • enabling isolation in a mixed-criticality setup where non-critical applications are executed on a shared hardware platform  ... 
doi:10.1109/access.2021.3080842 fatcat:kxhfuoc7zzdediivmah7tyl5ea

Low-overhead hard real-time aware interconnect network router

Michel A. Kinsy, Srinivas Devadas
2014 2014 IEEE High Performance Extreme Computing Conference (HPEC)  
We propose a network-on-chip router that provides predictable and deterministic communication latency for hard real-time data traffic while maintaining high concurrency and throughput for best-effort/general-purpose  ...  This trend gives rise to new problems such as the sharing of on-chip network resources among hard real-time and normal best effort data traffic.  ...  These safety critical system components are integrated onto a single chip with multimedia and comfort applications, e.g., seat-adjusted braking, fuel utilization analysis, data streaming, and voice commands  ... 
doi:10.1109/hpec.2014.7040976 dblp:conf/hpec/KinsyD14 fatcat:scnalfnj3ba5vpjb3chisz4xoy

A survey on wireless multimedia sensor networks

Ian F. Akyildiz, Tommaso Melodia, Kaushik R. Chowdhury
2007 Computer Networks  
In this paper, the state of the art in algorithms, protocols, and hardware for wireless multimedia sensor networks is surveyed, and open research issues are discussed in detail.  ...  The availability of low-cost hardware such as CMOS cameras and microphones has fostered the development of Wireless Multimedia Sensor Networks (WMSNs), i.e., networks of wirelessly interconnected devices  ...  Vuran for their valuable comments.  ... 
doi:10.1016/j.comnet.2006.10.002 fatcat:7szaxvgwhzeitfcfc3nnzqyk4i

Multimedia Internet of Things: A Comprehensive Survey

Ali Nauman, Yazdan Ahmad Qadri, Muhammad Amjad, Yousaf Bin Zikria, Muhammad Khalil Afzal, Sung Won Kim
2020 IEEE Access  
The immense increase in multimedia-on-demand traffic that refers to audio, video, and images, has drastically shifted the vision of the Internet of Things (IoT) from scalar to Multimedia Internet of Things  ...  Delaysensitive and bandwidth-hungry multimedia applications over constrained IoT networks require revision of IoT architecture for M-IoT.  ...  efficient routing path selection and scheduling.  ... 
doi:10.1109/access.2020.2964280 fatcat:ilihkpik65bdvblyal6rp7tb2y

Ethernet – A Survey on its Fields of Application

Jorg Sommer, Sebastian Gunreben, Frank Feller, Martin Kohn, Ahlem Mifdaoui, Detlef Sass, Joachim Scharf
2010 IEEE Communications Surveys and Tutorials  
Apart from LAN installations, Ethernet became also attractive for many other fields of application, ranging from industry to avionics, telecommunication, and multimedia.  ...  Our primary objective is to show how Ethernet has been enhanced to comply with the specific requirements of several application fields, particularly in transport, embedded and multimedia contexts.  ...  The work presented in this paper was partly funded within the 100GET project 100G ARP by the German Bundesministerium für Bildung und Forschung under contract No. 01BP0768.  ... 
doi:10.1109/surv.2010.021110.00086 fatcat:yx3kkhsobbdpxajvunyflj2g3q

VEGa: A High Performance Vehicular Ethernet Gateway on Hybrid FPGA

Shanker Shreejith, Philipp Mundhenk, Andreas Ettner, Suhaib A. Fahmy, Sebastian Steinhorst, Martin Lukasiewycz, Samarjit Chakraborty
2017 IEEE transactions on computers  
ACKNOWLEDGMENTS This work was supported by the Singapore National Research Foundation under its Campus for Research Excellence And Technological Enterprise (CREATE) programme.  ...  With the support of the Technische Universität München -Institute for Advanced Study, funded by the German Excellence Initiative and the European Union Seventh Framework Programme under grant agreement  ...  This bridging enables a simple exploit on a low criticality ECU to gain access to safety critical network segments and to alter the software code on safety critical ECUs.  ... 
doi:10.1109/tc.2017.2700277 fatcat:p5moepc6rvhvjix74mviiaqw3u

Globally Synchronized Frames for guaranteed quality-of-service in on-chip networks

Jae W. Lee, Man Cheuk Ng, Krste Asanović
2012 Journal of Parallel and Distributed Computing  
In this paper, we present a new scheme, Globally-Synchronized Frames (GSF), to implement QoS for multi-hop on-chip networks.  ...  This paper introduces Globally-Synchronized Frames (GSF), a framework for providing guaranteed QoS in on-chip networks in terms of minimum bandwidth and maximum delay bound.  ...  Fig. 3 . 3 Four quadrants of the solution space for QoS in the multi-hop on-chip networks.  ... 
doi:10.1016/j.jpdc.2012.01.013 fatcat:k7rn5pj6w5gm5e6rzfn5cxinfm

Securing Real-Time Internet-of-Things

Chien-Ying Chen, Monowar Hasan, Sibin Mohan
2018 Sensors  
However, RT-IoT are also increasingly becoming targets for cyber-attacks, which is exacerbated by this increased connectivity.  ...  Many critical cyber-physical systems have real-time requirements (e.g., avionics, automobiles, power grids, manufacturing systems, industrial control systems, etc.).  ...  Acknowledgments: The multiple security frameworks presented in this paper are the result of a team effort.  ... 
doi:10.3390/s18124356 fatcat:2jgtpytntnexhnxv6zace45yh4

Adaptive Scheduling for Time-Triggered Network-on-Chip-Based Multi-Core Architecture Using Genetic Algorithm

Pascal Muoka, Daniel Onwuchekwa, Roman Obermaisser
2021 Electronics  
Nevertheless, utilising existing metascheduling schemes for time-triggered network-on-chip architectures poses design time computation and run-time storage challenges for adaptation using the resulting  ...  In this work, an algorithm for path reconvergence in a multi-schedule graph, enabled by a reconvergence horizon, is presented to manage the state-space explosion problem resulting from an increase in the  ...  On the other hand, a Network-on-Chip indirectly connects chip components via a network of switches where each component interfaces the network through a network interface, combining the benefits of busses  ... 
doi:10.3390/electronics11010049 fatcat:qgx7z7fnoza3vmjkxaxw5iomxm

Deployment of IoV for Smart Cities: Applications, Architecture, and Challenges

Li-Minn Ang, Kah Phooi Seng, Gerald K. Ijemaru, Adamu Murtala Zungeru
2019 IEEE Access  
Currently, surveys from many authors have focused concentration on the IoV as only serving applications for intelligent transportation like driver safety, traffic efficiency, and infotainment.  ...  the packet delivery success rate in the dynamic network structure in a smart city scenario.  ...  An example application is the scheduling of traffic signals at intersections based on the traffic volume to reduce the waiting time.  ... 
doi:10.1109/access.2018.2887076 fatcat:bgeq6ozrlvbufnt3xaoqz52xme

Guaranteeing the Quality of Services in Networks on Chip [chapter]

Kees Goossens, John Dielissen, Jef van Meerbergen, Peter Poplavko, Andrei Rădulescu, Edwin Rijpkema, Erwin Waterlander, Paul Wielage
2003 Networks on Chip  
System-on-chip designers use networks on chip (NOC) to solve deep submicron problems, and to divide global problems into local, decoupled problems.  ...  Users expect a predictable quality of service (QOS) of embedded systems, even for future, more dynamic, applications.  ...  It predicts that chips in 2010 will count over 4 billion transistors, operating in the multi-GHz range [1] .  ... 
doi:10.1007/0-306-48727-6_4 fatcat:zvhon554hrhbdkzkjkuwkhw2ei

Artificial Intelligence (AI) and Machine Learning for Multimedia and Edge Information Processing

Jasmine Kah Phooi Seng, Kenneth Li-minn Ang, Eno Peter, Anthony Mmonyi
2022 Electronics  
by AI; (2) multimedia streaming on the intelligent edge; (3) multimedia edge caching and AI; (4) multimedia services for edge AI; and (5) hardware and devices for multimedia on edge intelligence.  ...  The advancements and progress in artificial intelligence (AI) and machine learning, and the numerous availabilities of mobile devices and Internet technologies together with the growing focus on multimedia  ...  safety-critical applications (e.g., autonomous vehicles).  ... 
doi:10.3390/electronics11142239 fatcat:wf5wt7whbrbkdggygptum56244

A quantitative evaluation of a Network on Chip design flow for multi-core consumer multimedia applications

Andreas Hansson, Kees Goossens
2011 Design automation for embedded systems  
A growing number of applications are integrated on the same System on Chip in the form of hardware and software Intellectual Property (IP).  ...  Networks on Chip (NoC) are proposed as a scalable communication architecture that is also able to deliver guaranteed performance.  ...  In contrast to the digital TV it is thus not only cache traffic that is latency critical. Due to the real-time nature of the application, predictability is crucial for all on-chip communication.  ... 
doi:10.1007/s10617-011-9073-7 fatcat:dp3mg6zdj5eb5hwd4dbslqhtyy

Energy-Efficient System-Level Design [chapter]

Luca Benini, Giovanni De Micheli
2002 Power Aware Design Methodologies  
towards component-based design techno logies that enable the integration of large computational cores, memory hierarchies and communication channel as well as system and application software onto a single chip  ...  On the contrary, performance can be slight ly worsened because the access time for the loop cache is on the critical path of the memory system.  ...  used for multi-processors.  ... 
doi:10.1007/0-306-48139-1_16 fatcat:rikxlmoqmjfd3o3whfmbnvymwm

Small LTE Base Stations Deployment in Vehicle-to-Road- Infrastructure Communications [chapter]

Luca Reggiani, Laura Dossi, Lorenzo Galati, Roberto Lambiase
2013 Vehicular Technologies - Deployment and Applications  
Small LTE Base Stations Deployment in Vehicle-to-Road-Infrastructure Communications 3 10.5772/55430 Small LTE Base Stations Deployment in Vehicle-to-Road-Infrastructure Communications  ...  /10.5772/55430 Vehicular Technologies -Deployment and Applications Small LTE Base Stations Deployment in Vehicle-to-Road-Infrastructure Communications http://dx.  ...  in a multi-cell scenario.  ... 
doi:10.5772/55430 fatcat:it4crgxzwnhojkqj2z7s3to33e
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