8 Hits in 6.1 sec

Modeling Time-Triggered Ethernet in SystemC/TLM for Virtual Prototyping of Cyber-Physical Systems [chapter]

Zhenkai Zhang, Xenofon Koutsoukos
2013 IFIP Advances in Information and Communication Technology  
When designing cyber-physical systems (CPS), virtual prototyping can discover potential design flaws at early design stages to reduce the difficulties at the integration stage.  ...  In this paper, a TTEthernet model in SystemC/TLM is developed to facilitate the design and integration of CPS.  ...  In [14] , an Ethernet interface in SystemC/TLM-2.0 is modeled for virtual platform or architectural exploration of Ethernet controllers.  ... 
doi:10.1007/978-3-642-38853-8_29 fatcat:p7rtinkvy5amxlflgvedkaozqy

A co-simulation framework for design of time-triggered automotive cyber physical systems

Zhenkai Zhang, Emeka Eyisi, Xenofon Koutsoukos, Joseph Porter, Gabor Karsai, Janos Sztipanovits
2014 Simulation modelling practice and theory  
Virtual prototyping of automotive vehicle is the core of this framework, which uses SystemC to model the cyber side of the system and integrates CarSim to model the physical side.  ...  A network/platform model in SystemC forms the backbone of the virtual prototyping, which bridges automotive control software and physical environment.  ...  A commercial tool called CarSim is used for modeling the physical layer, and SystemC/TLM is applied for modeling the cyber parts including the software layer and the network/platform layer, since it is  ... 
doi:10.1016/j.simpat.2014.01.001 fatcat:t6zlohheg5c35n4sagrllokfgu

The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration

Kim Grüttner, Philipp A. Hartmann, Kai Hylla, Sven Rosinger, Wolfgang Nebel, Fernando Herrera, Eugenio Villar, Carlo Brandolese, William Fornaciari, Gianluca Palermo, Chantal Ykman-Couvreur, Davide Quaglia (+2 others)
2013 Microprocessors and microsystems  
In this paper, we discuss the design challenges of today's heterogeneous HW/SW systems regarding power and complexity, both for platform vendors as well as system integrators.  ...  Our proposed flow combines system-level timing and power estimation techniques available in commercial tools with platform-based rapid prototyping.  ...  Acknowledgment The authors thank all partners involved in the COMPLEX FP7 European Integrated Project [6] , funded by the European Commission under Grant Agreement 247999.  ... 
doi:10.1016/j.micpro.2013.09.001 fatcat:7a5ycc45m5h7nkjhxhe4u2j7am

CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties

Ralph Gorgen, Kim Gruttner, Fernando Herrera, Pablo Penil, Julio Medina, Eugenio Villar, Gianluca Palermo, William Fornaciari, Carlo Brandolese, Davide Gadioli, Sara Bocchio, Luca Ceva (+10 others)
2016 2016 Euromicro Conference on Digital System Design (DSD)  
ForSyDe provides a system modeling environment targeting heterogeneous embedded systems and cyber-physical systems.  ...  into SystemC/TLM in order to apply the EDALab tools modelling methodology/tools The Intecs application must be ported onto the Open Virtual Platform to maximize synergies with other EDALab initiatives  ...  At all levels, but especially for in-field devices, power consumption is a critical issue.  ... 
doi:10.1109/dsd.2016.95 dblp:conf/dsd/GorgenGHPMVPFBG16 fatcat:t4f6yfdmrnfwfozoj2iveywwna

High-Level Synthesis for FPGAs: From Prototyping to Deployment

Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo Noguera, Kees Vissers, Zhiru Zhang
2011 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
The latest generation of HLS tools has made significant progress in providing wide language coverage and robust compilation technology, platform-based modeling, advancement in core HLS algorithms, and  ...  Despite the unsuccessful adoptions of early generations of commercial high-level synthesis (HLS) systems, we believe that the tipping point for transitioning to HLS methodology is happening now, especially  ...  Designers commonly use SystemC TLMs to describe virtual software/hardware platforms, which serve three important purposes: early embedded software development, architectural modeling and exploration, and  ... 
doi:10.1109/tcad.2011.2110592 fatcat:rr75vomr6zf5vhgs3swjblslza

TIMEA: Time-triggered message-based multicore architecture for AUTOSAR

Moisés Ignacio Urbina Fuentes, Universitätsbibliothek Siegen
The so-called TIMEA (TIme-triggered MEssage-based multicore platform for AUTOSAR) defines a message-based NoC as the only physical medium for the communication between the cores and introduces autonomous  ...  efficiency in comparison to the common shared memory approaches implemented for the development of multicore systems.  ...  SystemC/TLM MPSoC Figure 5.6: SystemC TTNoC simulation Model During the execution of the framework, a cyclic dispatcher method is called in the network interface to determine whether a time-triggered  ... 
doi:10.25819/ubsi/7652 fatcat:q43teowhizaalaegzyp52tloty

Simulation-based testing of failsafe industrial peripheral modules

Mario Saric, Thilo Sauter
Their scope of application ranges from simple emergency stop systems to more advanced systems, such as those used in hydro power plants for monitoring turbine rotation.  ...  To ensure functional safety, the modules are developed in accordance with the IEC 61508 standard. For the software part, the use of the V-model is highly recommended by the IEC 61508.  ...  Virtual prototyping commercial tools would be a great choice because they offer a number of toolboxes, large database of IP models and even support importing of additional SystemC-TLM models.  ... 
doi:10.34726/hss.2019.55184 fatcat:dd4sdaf7cbaefhzfj2rizu7s5e

Contract Testing for Reliable Embedded Systems

Raul Schmidlin Fajardo Silva
Surprisingly for me, I have learned about relations and communication as much as I have learned about my subject.  ...  Thanks to many discussions with people from different specific areas of the ECOMODIS project,  ...  For this, a virtual system prototype is created that models the behavior of the target system. This system model is an architectural proposal for the target system made of component models.  ... 
doi:10.11588/heidok.00015941 fatcat:2g6nmpletrd4jpcmopzvlvz4aa