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WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach

Steven Derrien, Isabelle Puaut, Panayiotis Alefragis, Marcus Bednara, Harald Bucher, Clement David, Yann Debray, Umut Durak, Imen Fassi, Christian Ferdinand, Damien Hardy, Angeliki Kritikakou (+8 others)
2017 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017  
Parallel architectures are nowadays not only confined to the domain of high performance computing, they are also increasingly used in embedded time-critical systems.  ...  In this paper we give an overview of the objectives of ARGO and explore the challenges introduced by our approach.  ...  Challenges in design productivity Model based design techniques are now widely spread in industry, and in particular in aerospace, automotive, and industrial automation to face the rising complexity of  ... 
doi:10.23919/date.2017.7927000 dblp:conf/date/DerrienPABBDDDF17 fatcat:7d3ac4uwwrb6llwboieuajjuqu

Special issue on design and architectures of real-time image processing in embedded systems

Daniel Chillet, Michael Hübner
2014 Journal of Real-Time Image Processing  
This is due to the diffusion of these systems in the domain of mobile devices and the need of a large number of services required from these systems.  ...  In this context, designers define architectures which include all the necessary resources on the same chip, also called "Multiprocessor System on a Chip" (MPSoC).  ...  To do such computation in a parallelized way, two models of architectures can be explored: FPGA and GPU.  ... 
doi:10.1007/s11554-014-0401-6 fatcat:f2mhcmcttbel5fpdfziqwgkqqq

Fuzzy Transducers as a Tool for Translating Noisy Data in Electrical Load Forecast System [chapter]

Mariusz Flasiński, Janusz Jurek, Tomasz Peszek
2016 Lecture Notes in Computer Science  
Kitowski 24 Exploring Memory Error Vulnerability for Parallel Programming Models I. Öz, M. Gil, G. Utrera and X.  ...  Bala 30 Parallelization and Optimization of a CAD Model Processing Tool from the Automotive Industry to Distributed Memory Parallel Computers L. F. Ayuso, J. J. Durillo, T. Fahringer, B.  ...  Special Session on Algorithms, Methodologies and Frameworks for HPC in Geosciences and Weather Prediction 102 Scaling the GCR solver using a high-level stencil framework on multi-and many-core architectures  ... 
doi:10.1007/978-3-319-32149-3_45 fatcat:3iiztskxgrhjxd6x45q42x3kkq

Automatic generation of hardware dependent software for MPSoCs from abstract system specifications

Gunar Schirner, Andreas Gerstlauer, Rainer Domer
2008 2008 Asia and South Pacific Design Automation Conference  
Increasing software content in embedded systems and SoCs drives the demand to automatically synthesize software binaries from abstract models.  ...  We target traditional RTOS-based multi-tasking solutions, as well as a pure interrupt-based implementation (without any RTOS).  ...  Exploration Example We use an automotive example to illustrate the exploration capabilities with respect to comparing the two multi-tasking approaches.  ... 
doi:10.1109/aspdac.2008.4483954 dblp:conf/aspdac/SchirnerGD08 fatcat:hzpwt46c5nbj3esufk22bojy74

Multicore enablement for Cyber Physical Systems

Andreas Herkersdorf
2012 2012 International Conference on Embedded Computer Systems (SAMOS)  
During the seminar the participants from industry and academia actively discussed chances and problems of multicore processors in embedded in cyber-physical systems.  ...  This report documents the program and the outcomes of Dagstuhl Seminar 13052 "Multicore Enablement for Embedded and Cyber Physical Systems".  ...  Analysis of Embedded Software for Multicore in the Automotive Domain The use of multi core processors in embedded systems is essential in future designs.  ... 
doi:10.1109/samos.2012.6404198 dblp:conf/samos/Herkersdorf12 fatcat:73whij7ozbfgpimxz4md3f4jii

E/E Architecture Synthesis: Challenges and Technologies

Hadi Askaripoor, Morteza Hashemi Farzaneh, Alois Knoll
2022 Electronics  
Accordingly, mapping techniques and optimization objectives for mapping tasks to multi-core processors using design space exploration method are studied.  ...  automotive embedded systems are expressed.  ...  The most relevant are explained in the following. PreeVision: A commercial tool for model-based development of distributed, embedded systems in the automotive industry.  ... 
doi:10.3390/electronics11040518 fatcat:u5cpyqwwnnbw7ppw3mv4hhhwg4

Architectural Design Space Exploration of Cyber-physical Systems Using the Functional Modeling Compiler

Arquimedes Canedo, Jan H. Richter
2014 Procedia CIRP  
We show that our FMC is capable of performing detailed multi-domain design space exploration of realistic automotive architectures.  ...  that can be directly used to perform architectural design space exploration using multi-disciplinary simulations in AMESim and Modelica.  ...  Automotive Use-Case A functional model of a car consisting of a two-level functional decomposition is shown in Figure 4 .  ... 
doi:10.1016/j.procir.2014.03.183 fatcat:4au26hrgnjff3ljb6v25xqehz4

Comparison between the Simulator and Scheduler based approach of Design Space Exploration for Application Specific Instruction set Processor

M. K.Jain, Deepak Gour
2012 International Journal of Computer Applications  
A list of explored design space parameters using simulator based approach is included in this paper.  ...  ASIP Design Space Exploration can be carried out by one of the two popular available techniques as Simulator or Scheduler based approach.  ...  Given an application specified in C language, the design system can generate a processor with a number of pipelines specifically suitable to the application, and the parallel code associated with the processor  ... 
doi:10.5120/6098-8290 fatcat:p2byhxibpzc77fu37s7z57rmny

The AMPERE Project: : A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization

Eduardo Quinones, Sara Royuela, Claudio Scordino, Paolo Gai, Luis Miguel Pinho, Luis Nogueira, Jan Rollo, Tommaso Cucinotta, Alessandro Biondi, Arne Hamann, Dirk Ziegenbein, Hadi Saoud (+5 others)
2020 2020 IEEE 23rd International Symposium on Real-Time Distributed Computing (ISORC)  
Index Terms-parallel programming models, parallel and heterogeneous embedded processor architectures, model-driven approaches, safety-critical embedded systems  ...  of the system.  ...  in the context of the parallel heterogeneous computing. • Parallel programming models.  ... 
doi:10.1109/isorc49007.2020.00042 dblp:conf/isorc/QuinonesRSGPNRC20 fatcat:4dse2jqgmvcbjbch4pfomq4kyi

The challenge of interoperability

Huafeng Yu, Prachi Joshi, Jean-Pierre Talpin, Sandeep Shukla, Shinichi Shiraishi
2015 Proceedings of the 52nd Annual Design Automation Conference on - DAC '15  
Model-Based Engineering (MBE) is a promising approach to cope with the challenges of designing the next-generation automotive systems.  ...  This paper briefly presents the interoperability challenges in the context of MBE and summarizes our current contribution to address these challenges with regard to automotive software control systems.  ...  In the following, we summarize our current contribution, aiming at addressing previous issues in the context of modelbased integration for automotive software control systems.  ... 
doi:10.1145/2744769.2747945 dblp:conf/dac/YuJTSS15 fatcat:dlsu7o7t4bgebgx7bv4wrlk7z4

A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability

Felipe Rosa, Fernanda Kastensmidt, Ricardo Reis, Luciano Ost
2015 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)  
Aiming at validating OVPSim-FIM, several fault injection campaigns were performed in ARM processors, considering a market leading RTOS and benchmarks with up to 10 billions of object code instructions.  ...  In this scenario, this paper proposes a fast and flexible fault injector framework, called OVPSim-FIM, which supports parallel simulation to boost up the fault injection process.  ...  multi/many-core systems.  ... 
doi:10.1109/dft.2015.7315164 dblp:conf/dft/RosaKRO15 fatcat:khaieht3pbdx3bsm6cwqvt5hii

High-Performance Embedded Architecture and Compilation Roadmap [chapter]

Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Mike O'Boyle, Dionisios Pnevmatikatos, Alex Ramirez, Pascal Sainrat, André Seznec, Per Stenström, Olivier Temam
2007 Lecture Notes in Computer Science  
The roadmap details several of the key challenges that need to be tackled in the coming decade, in order to achieve scalable performance in multi-core systems, and in order to make them a practical mainstream  ...  (vi) runtime systems, (vii) benchmarking, (viii) simulation and system modeling, (ix) reconfigurable computing, and (x) real-time systems.  ...  From this data set it will build an optimizing model based on the real processor performance.  ... 
doi:10.1007/978-3-540-71528-3_2 fatcat:ywmebvj7wrfb3ojghsjs4w3fy4

Issues and Challenges in Development of Massively-Parallel Heterogeneous MPSoCs Based on Adaptable ASIPs

Lech Jozwiak, Menno Lindwer
2011 2011 19th International Euromicro Conference on Parallel, Distributed and Network-Based Processing  
Keywords-embedded systems, heterogeneous multi-processor system-on-chip (MPSoC), customizable ASIPs, architecture synthesis, MPSoC and ASIP design automation; I.  ...  This paper focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous massively-parallel MPSoCs based on customizable application-specific instruction-set processors  ...  ACKNOWLEDGMENT The authors of this paper are indebted to all partners of the ASAM project.  ... 
doi:10.1109/pdp.2011.55 dblp:conf/pdp/JozwiakL11 fatcat:s7hkhc7gx5bhtnarwpquhwvc5m

Mapping Time-Critical Safety-Critical Cyber Physical Systems to Hybrid FPGAs

Kizheppatt Vipin, Shanker Shreejith, Suhaib A. Fahmy, Arvind Easwaran
2014 2014 IEEE International Conference on Cyber-Physical Systems, Networks, and Applications  
Cyber Physical Systems (CPSs), such as those found in modern vehicles, include a number of important time and safety-critical functions.  ...  Hybrid FPGAs, combining a processor and reconfigurable fabric on a single die, allow for parallel hardware implementation of complex sensor processing tightly coupled with the flexibility of software on  ...  Examples of such systems are abundant in many domains including automotive systems.  ... 
doi:10.1109/cpsna.2014.14 dblp:conf/cpsna/VipinSFE14 fatcat:yam4aw6hmnaifjjsne3eau4tei

Optimization Algorithms for Design Space Exploration of Embedded Systems [chapter]

Enrico Rigoni, Carlos Kavka, Alessandro Turco, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria, Giovanni Mariani
2011 Multi-objective Design Space Exploration of Multiprocessor SoC Architectures  
In the age of multi/many core architectures, system optimization and exploration definitely represent challenging research tasks.  ...  Multi-objective exploration of the huge design space of next generation multi/many core architectures needs for Automatic Design Space Exploration techniques to systematically explore the design choices  ...  The management of system resources for an MPSoC dedicated to multiple MPEG4 encoding is addressed in the context of an Automotive Cognitive Safety System.  ... 
doi:10.1007/978-1-4419-8837-9_3 fatcat:jprld4pwfzcgrfrvx7ayu5k5wu
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