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Model-Based Hardware Generation and Programming - The MADES Approach

Ian Gray, Nikos Matragkas, Neil C. Audsley, Leandro Soares Indrusiak, Dimitris Kolovos, Richard Paige
2011 2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops  
This paper gives an overview of the model-based hardware generation and programming approach proposed within the MADES project.  ...  This paper concentrates on MADES's approach to the specification of hardware and the way in which software is refactored by Compile-Time Virtualisation.  ...  OVERVIEW OF THE MADES APPROACH This section provides an overview of the model-based hardware generation and programming aspects of the MADES project and identifies the high level artifacts and the mappings  ... 
doi:10.1109/isorcw.2011.20 dblp:conf/isorc/GrayMAIKP11 fatcat:z6647xy7abddxafkxcldlpoi54

A Graphical Framework for High Performance Computing Using An MDE Approach

Julien Taillard, Frederic Guyomarc'h, Jean-Luc Dekeyser
2008 16th Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2008)  
Although the model approach and High Performance Computing are two different fields, the latter can take advantage of modeling to make design, reuse and parallel programming easier.  ...  This approach based on models allows a better reuse and also gives a better and more hierarchic view of the application so that it can better fit the architecture.  ...  Related work A use of model approach for the HPC has already been studied. Pllana and Fahringer [11] have made a model approach for High Performance Computing based on UML activity diagram.  ... 
doi:10.1109/pdp.2008.74 dblp:conf/pdp/TaillardGD08 fatcat:mehoex6nvre35ckct4df6av5lq

A unified HW/SW interface model to remove discontinuities between HW and SW design

Aimen Bouchhima, Xi Chen, Frédéric Pétrot, Wander O. Cesário, Ahmed A. Jerraya
2005 Proceedings of the 5th ACM international conference on Embedded software - EMSOFT '05  
One major challenge in System-on-Chip (SoC) design is the definition and design of interfaces between hardware and software.  ...  Traditional ASIC designer and software designer model HW/SW interface twice. Using two separate models introduces a discontinuity between hardware and software.  ...  Figure 5 . 5 Unified HW/SW Model using the service-based model Figure 6 . 6 Example of hardware-dependent software and a simple CPU subsystem  ... 
doi:10.1145/1086228.1086258 dblp:conf/emsoft/BouchhimaCPCJ05 fatcat:lszirosrsngungpofozelwqcri

Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components [chapter]

Rajesh K. Gupta, Claudionor Nunes Coelho, Giovanni De Micheli
2002 Readings in Hardware/Software Co-Design  
The input system model is partitioned into hardware and software components based on imposed performance constraints.  ...  In particular, we describe a program, Poseidon, that performs concurrent eventdriven simulation of multiple functional modules implemented either as a program or as behavioral or structural hardware models  ...  As a result of system partitioning and program threads generation in Vulcan-II, the system design at this stage consists of interacting hardware modules modeled by the hardware graph models and a software  ... 
doi:10.1016/b978-155860702-6/50049-1 fatcat:bji2ucsntjbbrlztwlnzp6ql5i

Page 92 of Journal of Research and Practice in Information Technology Vol. 27, Issue 3 [page]

1995 Journal of Research and Practice in Information Technology  
Our approach pro- vides a rich, domain-specific, model-based program- ming environment and program synthesis technology (or briefly model based programming — MBP) that directly support concepts, relations  ...  The key concepts of the approach are the domain-specific model-based programming environment and the automatic software synthesis technique enabling non-software engineers to build complex applications  ... 

Survey of modern technologies of simulation-based verification of hardware

A. S. Kamkin, M. M. Chupilko
2011 Programming and computer software  
Comparative analysis of modern approaches to simulation based verification (testing) of hard ware models-AVM (advanced verification methodology) developed by the Mentor Graphics Corporation, OVM (open  ...  In the paper, advantages and disadvantages of these approaches are analyzed, and architectures of the test systems are compared.  ...  The basic stress in these technologies is made on multiple test reuses, which is achieved by means of the object ori ented programming and transaction level modeling.  ... 
doi:10.1134/s0361768811030017 fatcat:zyl7podoyfbsthq5b47ey4rlzu

Multilanguage Specification for System Design [chapter]

A. A. Jerraya, M. Romdhani, Ph. Marrec, F. Hessel, P. Coste, C. Valderrama, G. F. Marchioro, J. M. Daveau, N.-E. Zergainoh
1999 System-Level Synthesis  
The recent version of SDL introduces a more generic communication model based on RPC. The new versions will also include more algorithmic capabilities.  ...  Remote procedure call is a hybrid model allowing to model both message passing and shared memory [20] .  ...  Hardware is modeled as behavioral VHDL, software is modeled as C-programs, Hardware/Software communication is performed through generic wires and the mechanical part remains as a Matlab model.  ... 
doi:10.1007/978-94-011-4698-2_3 fatcat:xjrihqmg7bczjlwr2eoaezpxsa


Dhara Kumari
2017 International Journal of Advanced Research in Computer Science  
, Memory Consistency Model and software based DSM mechanisms and issues of importance for various DSM systems and approaches.  ...  different types of DSM (Software based, Hardware Based and it may be combine both Software & Hardware etc) because IT technology is greatly advanced and lot's of information is shared via the internet.  ...  A memory model can be defined at any interface between the programmer and the system whereas the system consists of the base hardware and programmers express their programs in machine-level instructions  ... 
doi:10.26483/ijarcs.v8i7.4406 fatcat:kjr35sorg5enxnztn3kj6kmzy4

Low Cost High Integrity Platform [article]

Thierry Lecomte, David Deharbe, Denis Sabatier, Etienne Prun, Patrick Péronne, Emmanuel Chailloux, Steven Varoumas, Adilla Susungi, Sylvain Conchon
2020 arXiv   pre-print
Using its IDE, Atelier B, to program the CLEARSY Safety Platform ensures a higherlevel of confidence on the software generated.  ...  The CLEARSY Safety Platform fulfils a need for a technical solution to overcome the difficulties to develop SIL3/SIL4 system with its technology based on a double-processor and a formal method with proof  ...  Fig. 2 : 2 Tools and files involved in the generation of the software Fig. 3 : 3 Tools architecture and dependencies Fig. 4 : 4 On-the-fly automatic model extraction from relay-based schematics and  ... 
arXiv:2005.07191v1 fatcat:g47xghtdofgghmgylyfeccsxfi

A New Formal Verification Approach for Hardware-dependent Embedded System Software

Bernard Schmidt, Carlos Villarraga, Thomas Fehmel, J^|^ouml;rg Bormann, Markus Wedler, Minh Nguyen, Dominik Stoffel, Wolfgang Kunz
2013 IPSJ Transactions on System LSI Design Methodology  
The model can be easily integrated into SAT-based verification environments such as those based on Bounded Model Checking (BMC).  ...  The proposed construction of the model allows for an efficient reasoning of the SAT solver over entire execution paths. Program netlists are compositional.  ...  Hardware-dependent Software Model The following analysis is based on finite unrollings of the transition logic of an FSM model of the processor and its program.  ... 
doi:10.2197/ipsjtsldm.6.135 fatcat:2xu5vfvcgjgp5agtwxeqpjrvwe

ESL Design Methodology

Deming Chen, Kiyoung Choi, Philippe Coussy, Yuan Xie, Zhiru Zhang
2012 Journal of Electrical and Computer Engineering  
The authors propose a generic execution model and a specific computation method to support hardware/software architecture evaluation.  ...  The paper "Hardware and software synthesis of heterogeneous systems from dataflow programs" by G.  ... 
doi:10.1155/2012/358281 fatcat:tg6yabj6mbg6nmgnb54yzmy5gi

Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems

George J. Starr, Jie Qin, Bradley F. Dutton, Charles E. Stroud, F. Foster Dai, Victor P. Nelson
2009 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems  
This paper presents a software based approach for automatic generation of digital circuitry for synthesis and incorporation in a mixed-signal circuit or system to provide Built-In Self-Test (BIST) and  ...  The measurements supported by the BIST circuitry include frequency response (both gain and phase), linearity and noise figure.  ...  After all decisions have been evaluated by the program, it can generate the hardware model. Each programming language has its own method for creating and writing files.  ... 
doi:10.1109/dft.2009.43 dblp:conf/dft/StarrQDSDN09 fatcat:kjyxgnb33jfr5ehzczgiyqz7ca

Platform-based software design flow for heterogeneous MPSoC

Katalin Popovici, Xavier Guerin, Frederic Rousseau, Pier Stanislao Paolucci, Ahmed Amine Jerraya
2008 ACM Transactions on Embedded Computing Systems  
Specific software development platforms (abstract models of the architecture) are generated and used to allow debugging of the different software components with explicit hardware-software interaction.  ...  An executable software stack is generated automatically for each processor from the initial model.  ...  The classical approaches for the software design use programming models to abstract the hardware architecture ( Figure 2b ).  ... 
doi:10.1145/1376804.1376807 fatcat:pacsjturcjfxdmafbhjhcnfqya

The State of Fault Injection Vulnerability Detection [chapter]

Thomas Given-Wilson, Nisrine Jafri, Axel Legay
2018 Lecture Notes in Computer Science  
Recent work has started to consider broad spectrum simulation approaches that can cover many fault models and relatively large programs.  ...  Similarly the connection between these broad spectrum simulations and hardware experiments is being validated to bridge the gap between the two approaches.  ...  More generally another key challenge for both software and hardware based approaches is the limited scope considered.  ... 
doi:10.1007/978-3-030-00359-3_1 fatcat:54ovnmm5q5f4dbvirhfk44tjw4

Approximate Worst-Case Execution Time Analysis for Early Stage Embedded Systems Development [chapter]

Jan Gustafsson, Peter Altenbernd, Andreas Ermedahl, Björn Lisper
2009 Lecture Notes in Computer Science  
The method should be applicable to a large variety of software engineering tools and hardware platforms used in embedded system development, leading to shorter development times and more reliable embedded  ...  A Worst-Case Execution Time (WCET) analysis finds upper bounds for the execution time of programs.  ...  Their work, and the measurement-based approach to WCET analysis used by Rapita systems [17] , both have similarities to our idea of deriving a timing model by program runs.  ... 
doi:10.1007/978-3-642-10265-3_28 fatcat:pe44znpktzhs3ep3mcwizoueky
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