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Model checking via reachability testing for timed automata [chapter]

Luca Aceto, Augusto Burgueño, Kim G. Larsen
1998 Lecture Notes in Computer Science  
In this paper we develop an approach to model-checking for timed automata via teachability testing. As our specification formalism, we consider a dense-time property language with clocks.  ...  We show how to automatically synthesize, for every formula ~, a test automaton T~, in such a way that checking whether a system S satisfies the property ~o can be reduced to a reachability question over  ...  We thank Patricia Bouyer for her help in the implementation of the tool, Ks Jelling Kristoffersen for his proof-reading, and the anonymous referees for their comments.  ... 
doi:10.1007/bfb0054177 fatcat:jji3w4dhkrcb5grg6fx4si763a

Model Checking via Reachability Testing for Timed Automata

Luca Aceto, Augusto Burgueno, Kim G. Larsen
1997 BRICS Report Series  
In this paper we develop an approach to model-checking for timed automata via reachability testing. As our specification formalism, we consider a dense-time logic with clocks.  ...  On the practical side, we have used the logic, and the associated approach to model-checking via reachability testing it supports, in the specification and verification in Uppaal of a collision avoidance  ...  We thank Patricia Bouyer for her help in the implementation of the tool, and Kåre Jelling Kristoffersen for his proofreading.  ... 
doi:10.7146/brics.v4i29.18955 fatcat:4iaidosfz5b4bf53wpkbhcrk5e

√erics: A Tool for Verifying Timed Automata and Estelle Specifications [chapter]

Piotr Dembiński, Agata Janowska, Paweł Janowski, Wojciech Penczek, Agata Półrola, Maciej Szreter, Bożena Woźna, Andrzej Zbrzezny
2003 Lecture Notes in Computer Science  
The paper presents a new tool for automated verification of Timed Automata as well as protocols written in the specification language Estelle.  ...  The current version offers an automatic translation from Estelle specifications to timed automata, and two complementary methods of reachability analysis.  ...  The BMC-based method combines the well-known forward reachability analysis and the bounded model checking method for Timed Automata [14, 15, 19, 20] .  ... 
doi:10.1007/3-540-36577-x_20 fatcat:h2cbpz7it5cjjffbweo6hwprlq

Towards generation of adaptive test cases from partial models of determinized timed automata

Bernhard K. Aichernig, Florian Lorber
2015 2015 IEEE Eighth International Conference on Software Testing, Verification and Validation Workshops (ICSTW)  
for model-based test case generation.  ...  Consequently, our model-based test-case generation algorithm for deterministic timed automata, which uses language inclusion, did not scale anymore.  ...  In previous work [3] we already developed a methodology for model-based mutation testing from timed automata.  ... 
doi:10.1109/icstw.2015.7107409 dblp:conf/icst/AichernigL15 fatcat:a2svn36jsrcgdblc7klyomoy2i

Time-Optimal Test Cases for Real-Time Systems [chapter]

Anders Hessel, Kim G. Larsen, Brian Nielsen, Paul Pettersson, Arne Skou
2004 Lecture Notes in Computer Science  
We demonstrate how to automatically generate real-time conformance test cases from timed automata specifications.  ...  Our technique allows time optimal test cases to be generated using manually formulated test purposes or automatically from various coverage criteria of the model.  ...  Figure 3 UPPAAL and Time-Optimal Reachability Uppaal is a verification tool for a timed automata based modelling language [11] .  ... 
doi:10.1007/978-3-540-40903-8_19 fatcat:vba5k4lagfdbzisd5dvigf3seq

Using Logic Coverage to Improve Testing Function Block Diagrams [chapter]

Eduard Paul Enoiu, Daniel Sundmark, Paul Pettersson
2013 Lecture Notes in Computer Science  
One way of dealing with test case generation for ensuring logic coverage is to approach it as a model-checking problem, such that model-checking tools automatically create test cases.  ...  Testing cost and time savings could be achieved if the process of deriving test cases for logic coverage is automated and provided test cases are ready to be executed.  ...  The authors would like to thank Elaine Weyuker and Thomas Ostrand for their valuable comments on this work.  ... 
doi:10.1007/978-3-642-41707-8_1 fatcat:2h2muckhz5gs5fukc7jwsahqxy

Embedded and Real-time Systems [chapter]

Edward L. Lamie
2009 Real-Time Embedded Multithreading Using ThreadX  
Verification models and techniques applied to testing and control of reactive systems RESEARCH CENTER Rennes -Bretagne-Atlantique THEME Embedded and Real Time Systems Project-Team VERTECS  ...  Model-checking timed automata The model of timed automata, introduced by Alur and Dill in the 90's [22] is commonly used to represent real-time systems.  ...  Off-line test selection with test purposes for non-deterministic timed automata 11 6.2.6. Monitor-based statistical model checking of timed systems 11 6.3. Control synthesis 12 6.3.1.  ... 
doi:10.1016/b978-1-85617-601-9.00001-2 fatcat:oo46lkp3gnbhbjc463pu7fs2hi

Embedded and Real-time Systems [chapter]

Edward L. Lamie
2009 Real-Time Embedded Multithreading Using ThreadX and MIPS  
Verification models and techniques applied to testing and control of reactive systems RESEARCH CENTER Rennes -Bretagne-Atlantique THEME Embedded and Real Time Systems Project-Team VERTECS  ...  Model-checking timed automata The model of timed automata, introduced by Alur and Dill in the 90's [22] is commonly used to represent real-time systems.  ...  Off-line test selection with test purposes for non-deterministic timed automata 11 6.2.6. Monitor-based statistical model checking of timed systems 11 6.3. Control synthesis 12 6.3.1.  ... 
doi:10.1016/b978-1-85617-631-6.00001-9 fatcat:sq7s43icwvgk7lro4lpmj46g4a

Timed automata as a formalism for expressing security: A survey on theory and practice

Johan Arcile, Étienne André
2022 ACM Computing Surveys  
Timed automata are a common formalism for the verification of concurrent systems subject to timing constraints.  ...  In this work, we review works studying security properties for timed automata in the last two decades.  ...  We would like to thank anonymous reviewers for their useful comments, as well as Jaime Arias and Laure Petrucci for a feedback on their recent works.  ... 
doi:10.1145/3534967 fatcat:bq3focapvzh77lf5qvdx4oskcm

Verified Certification of Reachability Checking for Timed Automata [chapter]

Simon Wimmer, Joshua von Mutius
2020 Lecture Notes in Computer Science  
Prior research has shown how to construct a mechanically verified model checker for timed automata, a popular formalism for modeling real-time systems.  ...  In this paper, we shift the focus from verified model checking to certifying unreachability.  ...  We only study reachability: it is the most important property that is checked with timed automata model checkers, and some model checkers only support reachability.  ... 
doi:10.1007/978-3-030-45190-5_24 fatcat:o3n7wn5z4ng4pi3q23vyq6va7a

Reachability in Higher-Order-Counters [chapter]

Alexander Heußner, Alexander Kartzow
2013 Lecture Notes in Computer Science  
We show that control-state reachability for level k HOCA with 0-test is complete for (k − 2)-fold exponential space; leaving out the 0-test leads to completeness for (k − 2)-fold exponential time.  ...  Restricting HOCA (without 0-test) to level 2, we prove that global (forward or backward) reachability analysis is P-complete.  ...  For this purpose we first replace in the P(Z k−2 (Z+)) every push ⊥ of level 1(i.e. a push applied to Z+) by 3 push ⊥ operations and each level 1 pop-operation by 3 popoperations of level 1.  ... 
doi:10.1007/978-3-642-40313-2_47 fatcat:tyqmxynumjdc5fjbaqovqhvh4m

Bisimulation Minimization in an Automata-Theoretic Verification Framework [chapter]

Kathi Fisler, Moshe Y. Vardi
1998 Lecture Notes in Computer Science  
It is considered impractical for symbolic model checking, however, because the required BDDs are prohibitively large for most designs.  ...  We revisit bisimulation minimization, this time in an automata-theoretic framework.  ...  Looking only at the model checking and language emptiness times, the results are mixed.  ... 
doi:10.1007/3-540-49519-3_9 fatcat:f6mgmsyoerfjhhw3uingt7whry

Multi-Robot Systems: Modeling, Specification, and Model Checking [chapter]

Ammar Mohammed, Ulrich Furbach, Frieder Stolzenburg
2010 Robot Soccer  
The tool performs reachability tests on the state space of the model.  ...  However, in the context of hybrid automata the term model checking usually refers to reachability testing, i.e. the question whether some (unwanted) state is reachable from the initial configuration of  ... 
doi:10.5772/7349 fatcat:scvgry75fnbyta67aajoot6rda

State Space Reduction Techniques for Component Interfaces [chapter]

Markus Lumpe, Lars Grunske, Jean-Guy Schneider
2008 Lecture Notes in Computer Science  
In particular, we apply both strong and weak bisimulation to Component Interaction Automata in order to obtain a minimal automata that can serve as a behavioral equivalent abstraction for a given component  ...  techniques impractical for real-world applications.  ...  On the other hand, using state space reduction via weak bisimulation, we were able to determine the respective compositions in substantially less time for all test scenarios.  ... 
doi:10.1007/978-3-540-87891-9_9 fatcat:afsg34taybhq3c7jrjnbwxhhxm

Timed Automata [chapter]

Rajeev Alur
1999 Lecture Notes in Computer Science  
Traditional techniques for model checking do not admit an explicit modeling of time, and are thus, unsuitable for analysis of real-time systems whose correctness depends on relative magnitudes of different  ...  Model checking is emerging as a practical tool for automated debugging of complex reactive systems such as embedded controllers and network protocols (see [23] for a survey).  ...  My research on timed automata has been in collaboration with Costas Courcoubetis, David Dill, Tom Henzinger, Bob Kurshan, and many others.  ... 
doi:10.1007/3-540-48683-6_3 fatcat:krziony2hzgj5ploa37xa5jfcy
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