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Minimization of permuted Reed-Muller Trees for cellular logic programmable Gate arrays
[chapter]
1993
Lecture Notes in Computer Science
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In this paper we present two programs, exact and approximate, for the minimization of Permuted R eed-Muller Trees that are obtained b y r epetitive application of Davio expansions (Shannon expansions for ...
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path architectures. ...
The Permuted-Reed-Muller-Tree (PRMT) searching program presented here, REMIT (REed-Muller Ideally permuted T rees), accepts a completely speci ed Boolean function in the form of an array o f O N d i s ...
doi:10.1007/3-540-57091-8_32
fatcat:7vsqtzavobf4xmncgbay7vkeke
Fastest linearly independent transforms over GF(2) and their properties
2005
IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications
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Index Terms-Fast transforms, Galois Field (2) [GF(2)], linearly independent (LI) logic, logic polynomial expansions, Reed-Muller (RM) transform. ...
The definitions are then extended to generate a larger family of LI transforms with the same computational cost through reordering and permutation. ...
One example of LI logic is the well-known Reed-Muller (RM) transform [8] - [15] which is used in many areas of digital logic design, such as testing and fault detection [13] , image processing [16 ...
doi:10.1109/tcsi.2005.852209
fatcat:cc4zedtepzd6jl5hfyf6ha2b7u
Book announcements
2000
Discrete Applied Mathematics
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Useful Background
2.1 Syndrome Decoding
2.2 Perfect Codes, Hamming Codes, Sphere-Packing
Bound
2.3 Packing Radius, Covering Radius, MDS Codes,
and Some Bounds
2.4 Self-Dual Codes, Golay Codes
2.5 Reed-Muller ...
:
The Twain Shall Meet
1.2 Inference Methods for Logic Models
1.3 Logic Modeling Meets Mathematical Modeling
1.4 The Difficulty of Inference
Chapter 2
Propositional Logic: Special Cases
2.1 Basic ...
doi:10.1016/s0166-218x(00)90007-6
fatcat:cemhaoz7rzdmdoec7pjjqiur2a
Tree restructuring approach to mapping problem in cellular-architecture FPGAs
Proceedings of EURO-DAC. European Design Automation Conference
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The proposed tree restructuring algorithm preserves local connectivity and allows direct mapping of the tree to the cellular array, thus eliminating the traditional routing phase. ...
A new technique for mapping combinational circuits to Fine-Grain Cellular-Architecture FPGAs is presented. ...
Perkowski, "Minimization of Permuted Reed-Muller Trees for Cellular Logic Programmable Gate Arrays."In H. Gruenbacher and R. ...
doi:10.1109/eurdac.1995.527390
dblp:conf/eurodac/RamineniCB95
fatcat:ryccaadbhrd25cofcsrgww3yqa
Reference list of indexed articles
2000
Discrete Applied Mathematics
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Kaushik, Comments on "A note on Reed-Muller codes" (N&e) 6 (1983) 213-214 180. M.B. Cozzens and ES. ...
Yamasaki, Quasiharmonic classification of infinite networks 2 (1980) 339-344 57. B.K. Dass and S.K. Muttoo, A note on Reed-Muller codes (Note) 2 (1980) 345-348 58. S. ...
doi:10.1016/s0166-218x(00)00209-2
fatcat:l53yxlj45ffdrdecl3uah2gj3y
Book report
2004
Computers and Mathematics with Applications
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3.4.1 Properties of TIFs. 3.4.2 Properties of TGIFs. 3.5 An Extended Green/Sas~o Hierarchy with a New Sub-Family for Ternary Reed-Muller Logic. 3.6 Quaternary S/D Trees. 3.7 An evolutionary Algorithm for ...
the Minimization of GFSOP Expressions Using IF Polarity from Multiple-Valued S/D Trees. 3.8 Summary. 4. ...
doi:10.1016/s0898-1221(04)84016-1
fatcat:szz7sksvhnentlcyspkplxuaya
Reference list of indexed articles
1999
Theoretical Computer Science
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Snir, Lower bounds on probabilistic linear decision trees 38 (1) (1985) 69-82 741. P.V. Ramanan and C.L. Liu, Permutation representation of k-ary trees 38 (1) (1985) 83-98 742. C. Beeri and M.Y. ...
Reed and A.W. Roscoe, A timed model for communicating sequential processes 58 (1-3) (1988) 249-261 1115. L.E. Rosier and H.-C. ...
doi:10.1016/s0304-3975(98)00320-x
fatcat:bdgg2ekzdjahdo7g2gtwbdye6m
2005 index
2005
IEEE Communications Letters
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-order Reed-Muller codes, simple max.-likelihood decoding. Schmidt, K.-U., + , COML Oct 05 912-914 irregular repeat CPM. ...
-order Reed-Muller codes, simple max.-likelihood decoding. forward link of WCDMA, mgt. Rouskas, A.N., + , COML Aug 05 679-681 commun. constraints, large syst. decentralized detect. perform. ...
Information rates adaptive RateLimit for 1xEV-DO reverse link traffic channels, rate control scheme BSased. HyeJeong Lee ...
doi:10.1109/lcomm.2005.1576594
fatcat:upvkv2oloze3jos34ny6hs6ove
Subject Index Volumes 1–200
2001
Discrete Mathematics
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graph, 1857, 1864, see also edge intersection graph of paths in a tree , see also
enumerative
enumeration formula, 1046, 1108, 3577, 4975
for Cayley trees, 1609
for C-permutations, 1609
enumeration ...
, 3707
partition graphs, 3650
enumeration of partitions, 56
of minimal diameter, 3588
paths, 843
permutations, 489, 843, 984, 1192, 1266, 1314,
1819
phylogenetic trees, 2405
planar maps, 43, 86 ...
for trees, 4133 (n, k)-graph, 289, 1013, 1574, 3141 with respect to edges, 2962 (n, k)-kernel, 2826, 5138 (n, k)-linear arborific, 5644 (n, k)-multigraph, 1389 (n, k)-parity factor, 3609 (n, k)-path ...
doi:10.1016/s0012-365x(00)00471-4
fatcat:znxg54q6ifgutnhzj3urcw455y
Multi-grid cellular genetic algorithm for optimizing variable ordering of ROBDDs
2012
2012 IEEE Congress on Evolutionary Computation
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This paper presents a cellular genetic algorithm for optimizing the variable order in Reduced Ordered Binary Decision Diagrams. The evolution process is inspired by a basic genetic algorithm. ...
A similarity based communication protocol between clusters of individuals from parallel grids is defined. The exchange of genetic material proves to considerably boost the quality of the solution. ...
Adaptive Interval Type-2 Fuzzy Logic Observer for Dynamic Positioning 131, Xue Tao Chen and Woei Wan Tan, Tracking Control of Surface Vessels via Adaptive Backstepping Interval Type-2 Fuzzy Logic Control ...
doi:10.1109/cec.2012.6256590
dblp:conf/cec/RotaruB12
fatcat:4ly3nrktw5habc6lf5err7d5py
Theory, Synthesis, and Application of Adiabatic and Reversible Logic Circuits for Security Applications
2014
2014 IEEE Computer Society Annual Symposium on VLSI
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I want to thank the members of my committee, -for all their hard work in making my graduate school experience an excellent experience. ...
Nagarajan Ranganathan, for giving me the opportunity to pursue my research, and for his valuable guidance and assistance over these last four years. ...
In [52] , this approach was expanded upon by using positive-polarity Reed-Muller (PPRM) decompositions are performed on a set of input functions represented as a truth table, and then searches a library ...
doi:10.1109/isvlsi.2014.88
dblp:conf/isvlsi/Morrison14
fatcat:jlzlbmocifchrkvng7zejvh6oq
Channel Coding: The Road to Channel Capacity
[article]
2006
arXiv
pre-print
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Finally, we sketch some of the practical applications of these codes. ...
We focus on the contributions that have led to the most significant improvements in performance vs. complexity for practical applications, particularly on the additive white Gaussian noise (AWGN) channel ...
Ali Pusane for his help in the preparation of this manuscript. Comments on earlier drafts by C. Berrou, J. L. Massey, and R. Urbanke were very helpful. ...
arXiv:cs/0611112v1
fatcat:iwrrtx7mpfhgzfenehztfi5vyy
Building Image Feature Kinetics for Cement Hydration Using Gene Expression Programming With Similarity Weight Tournament Selection
2015
IEEE Transactions on Evolutionary Computation
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.: Using software simulators to enhance the learning of digital logic design for the information technology students. ...
.: An evolutionary algorithm based on Reed-Muller partition
tree model. Int. J. Wire. Mob. Comput. ...
Evolvable Hardware: From Practice to Zhu J., Zhang T.: An evolutionary algorithm based on Reed-Muller partition tree model. Int. J. Wire. Mob. Comput. Bao Z., Wang F., Zhao X. ...
doi:10.1109/tevc.2014.2367111
fatcat:dsfdt3ngn5htfdg4ydmofrqznm
Channel coding: The road to channel capacity
2007
Proceedings of the IEEE
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Finally, we sketch some of the practical applications of these codes. ...
We focus on the contributions that have led to the most significant improvements in performance versus complexity for practical applications, particularly on the additive white Gaussian noise channel. ...
Pusane for his help in the preparation of this manuscript. Comments on earlier drafts by C. Berrou, J. L. Massey, and R. Urbanke were very helpful. ...
doi:10.1109/jproc.2007.895188
fatcat:pftdplkbergcbpkra6ddfwjtpa
Development of SyReC based expandable reversible logic circuits
[article]
2014
arXiv
pre-print
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One of the prominent advantages perceived from reversible logic is that of reduced power dissipation with many reversible gates at hand, designing a reversible circuit (combinational) has received due ...
The importance of observing the change in costs with respect to scale of expansion is important not only from analysis point of view, but also because the cost depends on the approach used for expansion ...
Reed-Muller expansion (PPRM) Search based synthesis approach uses the PPRM representation (1996) element field 8 GF(2) is defined as R = M n F where M 0 = [1]; M n = M n−1 0 M n−1 M n−1 (2.2)
Matrix ...
arXiv:1403.2686v1
fatcat:m3fjygmi4zgv3iomk6nhm6f2qa
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