2,201 Hits in 7.8 sec

Using microcode in the functional verification of an I/O chip

S. P. Goldman, L. M. Mohr, D. R. Smith
2005 IBM Journal of Research and Development  
System function that had mistakenly been omitted from hardware and microcode was identified and marked for implementation in higher-level software.  ...  In addition to these tests, complete support for recovery and error testing was added.  ... 
doi:10.1147/rd.494.0581 fatcat:veirbjo7ljdzzlaakhp56vkxby

The Proteus Processor — A Conventional CPU with Reconfigurable Functionality [chapter]

Michael Dales
1999 Lecture Notes in Computer Science  
We end by specifying the initial work plan for the project.  ...  The research will investigate a novel microprocessor design incorporating reconfigurable logic in its ALU, allowing the processor's function units to be customised to suit the currently running application  ...  Operating System Issues On the software level, we have the question of resource management of the RFUs.  ... 
doi:10.1007/978-3-540-48302-1_49 fatcat:ypukluuq5ffwjllh26hwx4hp2y

A Parallel Functional Database on GRIP [chapter]

Gert Akerholt, Kevin Hammond, Simon Peyton Jones, Phil Trinder
1992 Functional Programming, Glasgow 1991  
The naive implementation provides evidence for the feasibility of a pure functional database in the form of modest real-time speed-ups, and acceptable real-time performance.  ...  GRIP is a shared-memory multiprocessor designed for e cient parallel evaluation of functional languages, using compiled graph reduction.  ...  The following range of operations is supported by our current IMU microcode: Variable-sized heap nodes may be allocated and initialised.  ... 
doi:10.1007/978-1-4471-3196-0_1 dblp:conf/fp/AkerholtHJT91 fatcat:jk4dxv7svnde7l3v2sujb3hdum

Instruction Set Extensions for Cryptographic Hash Functions on a Microcontroller Architecture

Jeremy H.-F. Constantin, Andreas P. Burg, Frank K. Gurkaynak
2012 2012 IEEE 23rd International Conference on Application-Specific Systems, Architectures and Processors  
In this paper, we investigate the benefits of instruction set extensions (ISEs) on a 16-bit microcontroller architecture for software implementations of cryptographic hash functions, using the example  ...  We show that our target applications benefit from algorithm-specific ISEs based on finite state machines for address generation, lookup table integration, and extension of computational units through microcoded  ...  Witte and F. Borlenghi) for the inspiring discussions and their support for the work with Processor Designer which was instrumental for getting started on this project.  ... 
doi:10.1109/asap.2012.13 dblp:conf/asap/ConstantinBG12 fatcat:tjhy42xxg5crdfcre453z6aczu

Code Generators for Mathematical Functions

Nicolas Brunie, Florent de Dinechin, Olga Kupriianova, Christoph Lauter
2015 2015 IEEE 22nd Symposium on Computer Arithmetic  
A typical floating-point environment includes support for a small set of about 30 mathematical functions such as exponential, logarithms and trigonometric functions.  ...  This article discusses, with examples, the new challenges of this paradigm shift, and presents the current state of open-source function code generators.  ...  For instance, the first 80287 mathematical coprocessor, in 1985, included support for a range of elementary functions (albeit in microcode) in addition to the basic operations.  ... 
doi:10.1109/arith.2015.22 dblp:conf/arith/BrunieDKL15 fatcat:5dainnds2fblnkbara4lneoora

A Programmable SoC Based Accelerator for Privacy Enhancing Technologies and Functional Encryption

Milad Bahadori, Kimmo J¨Arvinen
2020 Zenodo  
Both of them represent the first hardware acceleration results for such operations and, in particular, the latter one is among the very first published implementation results of functional encryption on  ...  functional encryption for inner products.  ...  ACKNOWLEDGMENTS This work has received funding from the European Union's Horizon 2020 research and innovation programme under grant agreement No 780108 (FENTEC).  ... 
doi:10.5281/zenodo.4022569 fatcat:vwjj3cnqubezzovvul3yfrk3ou

Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller

Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen
2010 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)  
Supporting Distributed Shared Memory (DSM) is essential for multi-core Network-on-Chips for the sake of reusing huge amount of legacy code and easy programmability.  ...  The controller is programmable where the DSM functions such as virtual-to-physical address translation, memory access and synchronization etc. are realized using microcode.  ...  The controller is programmable and the support for DSM functions is implemented in microcode. The operation of the controller is triggered by requests from local and remote cores.  ... 
doi:10.1109/date.2010.5457240 dblp:conf/date/ChenLJC10 fatcat:xp34rdfppnar5ltaenbesssyuy

Progress in a novel architecture for high performance processing

Zhiwei Zhang, Meng Liu, Zijun Liu, Xueliang Du, Shaolin Xie, Hong Ma, Guangxin Ding, Weili Ren, Fabiao Zhou, Wenqin Sun, Huijuan Wang, Donglin Wang
2018 Japanese Journal of Applied Physics  
It is suitable for data intensive applications like supercomputing, machine learning and wireless communication.  ...  An example chip with four application-specific integrated circuit (ASIC) cores which is the first generation of HPP cores has been taped out successfully under Taiwan Semiconductor Manufacturing Company  ...  To improve performance for special applications, new microcode type such as the ones supporting trigonometric functions and bit operations are added.  ... 
doi:10.7567/jjap.57.04fa03 fatcat:gzaau2ryf5a43ccyxub672k5ei

The Molen Programming Paradigm [chapter]

Stamatis Vassiliadis, Georgi Gaydadjiev, Koen Bertels, Elena Moscu Panainte
2004 Lecture Notes in Computer Science  
A number of programming examples and discussion is provided in order to clarify the operation, sequence control and parallelism of the proposed programming paradigm.  ...  The programming paradigm allows for modularity and provides mechanisms for explicit parallel execution.  ...  Many architectures (see for examples in [7] ) do not take into account this issue and their mechanism for FPGA integration cannot be extended to support parallelism. 4) No modularity: each approach has  ... 
doi:10.1007/978-3-540-27776-7_1 fatcat:bepnaezftbgcpjn7nzf52i55tq

A high-performance microarchitecture with hardware-programmable functional units

Rahul Razdan, Michael D. Smith
1994 Proceedings of the 27th annual international symposium on Microarchitecture - MICRO 27  
We briefly discuss the operating system and the programming language compilation techniques that are needed to successfully build PRISC and, we present performance results from a proof-of-concept study  ...  Although similar in concept, the PRISC approach differs from dynamically programmable microcode because in PRISC we define entirely-new primitive datapath operations.  ...  Similarly, the profile data is for the application execution only-operating system issues and performance are ignored.  ... 
doi:10.1145/192724.192749 fatcat:5b4xwjneyrbh3nbumgir5poecq

The continuing evolution of Advanced Function Printing

R. J. Howarth, B. G. Platte
1993 IBM Systems Journal  
For example, PSF/MVS operates as a Job Entry Subsystem (JES) func- tional subsystem and supports the standard JES console commands for interfacing with the printer.  ...  Technical issues. Distributed printing software in operating systems today has evolved with the no- tion that only like operating systems need to be connected.  ... 
doi:10.1147/sj.324.0665 fatcat:4d4zyr5lu5a7niiyyifyx3luei

Future Directions Of Programmable And Reconfigurable Embedded Processors [chapter]

Sorin Cotofana, Stamatis Vassiliadis, Stephan Wong
2003 Signal Processing and Communications  
Finally, we describe in-depth one possible approach that combines both programmability and reconfigurability in an integrated manner by utilizing microcode.  ...  This has led to the quest for a flexible and reusable embedded processor that still must achieve the required performance levels.  ...  For example, such requirements involve the cost/performance sensitiveness of embedded processors making low cost almost always an issue.  ... 
doi:10.1201/9780203913185.ch12 fatcat:oblucnbgqra2tiroy5zakemxdy

On the Design and Misuse of Microcoded (Embedded) Processors - A Cautionary Note

Nils Albartus, Clemens Nasenberg, Florian Stolz, Marc Fyrbiak, Christof Paar, Russell Tessier
2021 USENIX Security Symposium  
Today's microprocessors often rely on microcode updates to address issues such as security or functional patches.  ...  Such attacks share many features with hardware Trojans and have similar devastating consequences for system security.  ...  Acknowledgements We would like to thank Iryna Schwindt for her initial research into commercial microcode, Felix Wegener for supporting us with the timing side-channel attack and Jérémie Crenne for his  ... 
dblp:conf/uss/AlbartusNSFPT21 fatcat:43b3ogfy5zdedoq2uy2jfmkju4

The MOLEN polymorphic processor

S. Vassiliadis, S. Wong, G. Gaydadjiev, K. Bertels, G. Kuzmanov, E.M. Panainte
2004 IEEE transactions on computers  
To prove the viability of the proposal, we experimented with the MPEG-2 encoder and decoder and a Xilinx Virtex II Pro FPGA. We have implemented three operations, SAD, DCT, and IDCT.  ...  In our proposal, for a given instruction set architecture, a onetime instruction set extension of eight instructions is sufficient to implement the reconfigurable functionality of the processor.  ...  ACKNOWLEDGMENTS This research is partially supported by PROGRESS, the embedded systems research program of the Dutch organization for Scientific Research NWO.  ... 
doi:10.1109/tc.2004.104 fatcat:ohon5wei7neohoi7e5l3gzzxtq

Architectures of Advanced Function Printing

R. K. deBry, B. G. Platte, C. L. Berinato, J. W. Marlin
1988 IBM Systems Journal  
Dr. deBry worked for two years on the Corporate Programming Staff in Purchase, New York, where he focused on architecture and system design issues relating to device support.  ...  Other device-control functions provide for duplex- ing, operator panel displays, paper sourcing, and finishing.  ... 
doi:10.1147/sj.272.0234 fatcat:eubo6vxydfbdvdwzcftfpnowbq
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