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Memory System Support for Irregular Applications
[chapter]
1998
Lecture Notes in Computer Science
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The Impulse con gurable memory controller will enable signi cant performance improvements for irregular applications, because it can be congured to optimize memory accesses on an application-by-application ...
Because irregular applications have unpredictable memory access patterns, their performance is dominated by memory behavior. ...
controller supports for irregular applications. ...
doi:10.1007/3-540-49530-4_2
fatcat:gmlkfqnwwvbqpnimhn56ysryu4
Compiling irregular applications for reconfigurable systems
2014
International Journal of High Performance Computing and Networking
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While FPGA-based code accelerators have been successful on applications with regular memory access patterns, they have not been further explored for irregular memory access patterns. ...
We describe the compiler generation of concurrent hardware threads for FPGAs with the objective of masking the memory latency caused by irregular memory access patterns. ...
Acknowledgements This work has been supported in part by NSF Awards 0905509 and 0811416, by Jacquard Computing Inc. and by the Air Force Research Lab. ...
doi:10.1504/ijhpcn.2014.062725
fatcat:n2kiseofmfhllezh7x6xbvzhou
Prototyping hardware support for irregular applications
2013
Proceedings of the 2013 Workshop on Rapid Simulation and Performance Evaluation Methods and Tools - RAPIDO '13
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We designed a set of hardware/software components that can potentially enhance commodity processors for efficiently executing irregular applications on multi-node systems, and we have integrated and validated ...
Developing irregular applications on them is complex, and often it does not provide performance scaling. ...
Our approach, instead, works at the chip level, and looks at extending the on-chip interconnect protocol of a multicore design for supporting irregular application on multi-node systems. ...
doi:10.1145/2432516.2432520
dblp:conf/rapido/CerianiSTV13
fatcat:hgxonz26irerdhz3maramenavy
Optimizing irregular shared-memory applications for clusters
2008
Proceedings of the 22nd annual international conference on Supercomputing - ICS '08
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This challenge is especially big when translating irregular shared-memory applications to message-passing form for clusters. ...
The analysis uses a region-based diff method and makes use of a runtime library that is optimized for irregular applications. We describe three optimizations that improve the LDSM system performance. ...
A related system is the CHAOS [24] runtime library, which supports data distribution and communication schedule generation for irregular applications. ...
doi:10.1145/1375527.1375566
dblp:conf/ics/MinE08
fatcat:4gozlvtnojfovf52tq2darod4y
Language and Compiler Support for Out-of-Core Irregular Applications on Distributed-Memory Multiprocessors
[chapter]
1998
Lecture Notes in Computer Science
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Current virtual memory systems provided for scalable computer systems typically offer poor performance for scientific applications when an application's working data set does not fit in main memory. ...
A promising approach is to develop a language support and a compiler system on top of an advanced runtime system which can automatically transform an appropriate in-core program to efficiently operate ...
In our recent papers [3, 4] , we describe the runtime support CHAOS+ we have developed for parallelization of irregular OOC applications on DMMPs. ...
doi:10.1007/3-540-49530-4_25
fatcat:s2dxsxjb5jac3oyxlrc6qrzqwy
Improving Transactional Memory Performance for Irregular Applications
2015
Procedia Computer Science
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In this work, a transactional memory system, ReduxSTM, is presented. The system is specifically developed to extract parallelism from irregular applications. ...
Most of these techniques are of general use, not tailored for specific types of applications. However, speculative techniques are especially useful for irregular applications. ...
Conclusions This work discussed ReduxSTM, a STM system designed to extract parallelism from irregular applications. ...
doi:10.1016/j.procs.2015.05.398
fatcat:cfvagkrvjvhorg6xowvqd2ipsu
Efficient Mapping of Irregular C++ Applications to Integrated GPUs
2014
Proceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization
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We present a compiler framework with support for C++ features that enables G-PU acceleration of a wide range of C++ applications with minimal changes. ...
Using Concord, we ran nine irregular C++ programs on two computer systems containing Intel 4 th Generation Core processors. ...
on the desktop system better data access, their infrastructure achieved significant performance improvement for two irregular data structure traversing applications. ...
doi:10.1145/2544137.2544165
fatcat:bjpwxwclfbeoflbz6c5d3f6fnq
Exploring irregular memory accesses on FPGAs
2011
Proceedings of the first workshop on Irregular applications: architectures and algorithm - IAAA '11
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While FPGA-based code accelerators have been successful on applications with regular memory access patterns, they have not been further explored for irregular memory access patterns. ...
We describe the compiler generation of concurrent hardware threads for FPGAs with the objective of masking the memory latency caused by irregular memory access patterns. ...
Acknowledgments This work has been supported in part by NSF Awards 0905509 and 0811416, by Jacquard Computing Inc. and by the Air Force Research Lab. ...
doi:10.1145/2089142.2089151
dblp:conf/sc/HalsteadVN11
fatcat:pznzvq34zfaonhi3e2hon7mjpa
Large-Scale Scientific Irregular Computing on Clusters and Grids
[chapter]
2002
Lecture Notes in Computer Science
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The most challenging are scientific and engineering applications that involve irregular (unstructured) computing phases. ...
This paper discusses an integrated approach, namely ideas, techniques, concepts and software architecture for implementing such data intensive applications on computational clusters and the computational ...
In [3] we presented the library lip which supports the development of OOC irregular applications on distributed-memory systems. ...
doi:10.1007/3-540-46043-8_49
fatcat:zxaunyxcpzh75ixhthaopounvy
Analysis of World Experience in Creating Parallel Computing Systems Designed to Effectively Solve DIS-tasks
2019
Journal Electrical and Electronic Engineering
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mostly irregular work with memory. ...
It is possible to provide support for a programming model with shared (shared) memory in various ways using hardware, as well as using virtualization software. ...
The pipelining of write and read accesses to global memory is supported. This can speed up calculations for irregular memory accesses. ...
doi:10.11648/j.jeee.20190705.11
fatcat:julpl22gtzdozkxcvo5ku5hp2m
AMMC: Advanced Multi-Core Memory Controller
2014
2014 International Conference on Field-Programmable Technology (FPT)
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AMMC has been coupled with a heterogeneous system that provides both generalpurpose cores and application specific accelerators. ...
In this work, we propose an efficient scheduler and intelligent memory manager known as AMMC (Advanced Multi-Core Memory Controller), which proficiently handles data movement and computational tasks. ...
He also proposes a controller [3] that supports irregular applications running on a single core. ...
doi:10.1109/fpt.2014.7082802
dblp:conf/fpt/HussainPUCAVG14
fatcat:jqigs76nfrcermrshne54gxi5i
An Adaptive Heterogeneous Runtime for Irregular Applications in the Case of Ray-Tracing (Extended Abstract)
[chapter]
2014
Lecture Notes in Computer Science
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On the other hand, in irregular code, both control flow and data memory references could be data dependent. For example, graph-based applications are ...
The irregularities in an application may throttle the expected performance of the GPU by as much as an order of magnitude. The terms regular and irregular are often used in compiler literature. ...
For example, Ray-Tracing is an irregular program that is intensively used for global illumination in multimedia applications and has been adopted for implementation on different heterogeneous models. ...
doi:10.1007/978-3-662-44917-2_63
fatcat:kisoz3mahvddnda5kpxv5vwjsi
PAMS: Pattern Aware Memory System for embedded systems
2014
2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)
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In this paper, we propose a hardware mechanism for embedded multi-core memory system called Pattern Aware Memory System (PAMS). ...
When compared with a Baseline Memory System, the PAMS consumes between 3 and 9 times and 1.13 and 2.66 times less program memory for static and dynamic data structures respectively. ...
The register file can improves the performance for applications having data locality, but does not support applications with large and irregular data structures. ...
doi:10.1109/reconfig.2014.7032544
dblp:conf/reconfig/HussainSPUCAVG14
fatcat:4fytjqvrrzhcnggo4sdnkzueqe
Efficient support for irregular applications on distributed-memory machines
1995
SIGPLAN notices
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CHAOS and XSM performed equivalently for all three applications. Both systems were somewhat (13%) to signi cantly faster (991%) than TSM. ...
Irregular computation problems underlie many important scienti c applications. ...
Acknowledgements We are indebted to the members of the Wisconsin Wind Tunnel 3 and CHAOS 4 projects for help with Blizzard, CHAOS, and applications. ...
doi:10.1145/209937.209945
fatcat:lo5zo7gxcfbwlfoej4x264fcxe
Exploring hardware support for scaling irregular applications on multi-node multi-core architectures
2013
2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors
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This paper presents a multi-node, multi-core, multi-threaded shared-memory system architecture designed for the execution of large-scale irregular applications, and built on top of three pillars that support ...
Third, hardware support is provided for interthread synchronization on the global address space. ...
In this paper, we present the design of a new full-system architecture for irregular applications based on commodity processors. ...
doi:10.1109/asap.2013.6567595
dblp:conf/asap/SecchiCTVPR13
fatcat:ynu4zfwjtratdlow4pzumvb2em
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