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Automatic vectorization of tree traversals
2013
Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques
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We show that the proposed memory-side prefetcher outperforms a state-of-the-art core-side prefetcher and an existing memory-side prefetcher. ...
By meeting requests midway, our solution reduces the off-chip latencies while avoiding the on-chip resource contention caused by inaccurate and ill-timed prefetches. ...
for locating the midway meeting point. ...
doi:10.1109/pact.2013.6618825
dblp:conf/IEEEpact/YedlapalliKKKDS13
fatcat:h7eypmksm5cwrpzlqay6jvlkxi
Advancing Operating Systems via Aspect-Oriented Programming
2011
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Many interactions in kernel code are dynamic, so in order to implement non-static behavior and improve performance, a dynamic weaver that deploys and undeploys aspects at system runtime is required. ...
Maintaining the kernel code and developing new functionality is increasingly compli- cated, since the amount of required features has risen significantly, leading to side ef fects that can be introduced ...
Replacing this implementation with a more efficient tree, such as a Red-Black tree, can improve file handling performance. ...
doi:10.17192/z2006.0138
fatcat:ojsjec4yizfyxli3h6pqgr2v5e
Domain specific languages for parallel numerical modeling on structured grids
2019
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As expected, to improve performance, variable access should be carried out in the shared memory rather than global memory, wherever possible. ...
The provided re-designed applications allowed the high-performance community to develop tools to accelerate and improve the design of high-performance computers [64] . ...
doi:10.13126/unical.it/dottorati/1758
fatcat:y34dd4vxmvesxhryh2fnnc6l64