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Optimal task placement to improve cache performance

Gernot Gebhard, Sebastian Altmeyer
2007 Proceedings of the 7th ACM & IEEE international conference on Embedded software - EMSOFT '07  
This observation has to be considered by timing analyses, which inevitably increases their complexity. Additionally, these cache-interferences influence the overall performance of such systems.  ...  If preemptive scheduling is enabled, the previously computed timing guarantees no longer hold. At each program point, a preempting task might completely change the cache content.  ...  Acknowledgements Thanks to Rheinhard Wilhelm and the anonymous reviewers for many helpful suggestions on how to improve the paper.  ... 
doi:10.1145/1289927.1289968 dblp:conf/emsoft/GebhardA07 fatcat:7yttw754ufhalb7qsmyzlpofem

Using Dynamic, Full Cache Locking and Genetic Algorithms for Cache Size Minimization in Multitasking, Preemptive, Real-Time Systems [chapter]

Antonio Martí Campoy, Francisco Rodríguez-Ballester, Rafael Ors Carot
2013 Lecture Notes in Computer Science  
Cache locking may also be useful to reduce hardware costs by means of reducing the size of the cache memory needed to make a real-time system schedulable.  ...  Using dynamic, full cache locking and genetic algorithms for cache size minimization in multitasking, preemptive, realtime systems. En Theory and Practice of Natural Computing.  ...  preemptive, multi-task, real-time systems.  ... 
doi:10.1007/978-3-642-45008-2_13 fatcat:rxynfsrtorcp3he5rcp2ch7pfq

WCRT analysis for a uniprocessor with a unified prioritized cache

Yudong Tan, Vincent J. Mooney
2005 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems - LCTES'05  
In this paper, we investigate the problem of inter-task cache interference in preemptive multi-tasking real-time systems.  ...  We extend a known tool, SYMTA, in order to estimate the Worst Case Execution Time of each task executing on a uniprocessor with a unified prioritized L1 cache.  ...  to real-time systems.  ... 
doi:10.1145/1065910.1065935 fatcat:k6uez3x4xvgrtliz67tjjrt7lq

WCRT analysis for a uniprocessor with a unified prioritized cache

Yudong Tan, Vincent J. Mooney
2005 SIGPLAN notices  
In this paper, we investigate the problem of inter-task cache interference in preemptive multi-tasking real-time systems.  ...  We extend a known tool, SYMTA, in order to estimate the Worst Case Execution Time of each task executing on a uniprocessor with a unified prioritized L1 cache.  ...  to real-time systems.  ... 
doi:10.1145/1070891.1065935 fatcat:rwagw3rzrjezjmjnkaj7mwmibq

A WCET-aware cache coloring technique for reducing interference in real-time systems [article]

Fabien Bouquillon, Clément Ballabriga, Giuseppe Lipari, Smail Niar
2019 arXiv   pre-print
The predictability of a system is the condition to give saferbound on worst case execution timeof real-time tasks which are running on it.  ...  Commercial off-the-shelf(COTS) processors are in-creasingly used in embedded systems and contain shared cache memory.  ...  In such systems, a real-time task has to be executed within predefined timing constraints, whose violation can lead to system failure.  ... 
arXiv:1903.09310v4 fatcat:lcf5iaeumzfrvpptw53lhm3m5e

SPeCK: a kernel for scalable predictability

Qi Wang, Yuxin Ren, Matt Scaperoth, Gabriel Parmer
2015 21st IEEE Real-Time and Embedded Technology and Applications Symposium  
However, as the number of cores increase, even a single shared cache-line (e.g. for the lock) can cause significant interference.  ...  Results show that, despite using a non-preemptive kernel, it has strong scalable predictability, low average-case overheads, and demonstrates better response-times than a state-of-the-art preemptive system  ...  Based on the non-preemptive design of SPECK kernel, the response time of the system is determined by the longest execution time in kernel.  ... 
doi:10.1109/rtas.2015.7108434 dblp:conf/rtas/WangRSP15 fatcat:urfk4jxbzbcorfrsvdtch5snwy

Investigation of Scratchpad Memory for Preemptive Multitasking

Jack Whitham, Robert I. Davis, Neil C. Audsley, Sebastian Altmeyer, Claire Maiza
2012 2012 IEEE 33rd Real-Time Systems Symposium  
(blocking due to task τ i ) Interference Non-ideal RTA Equation  RTOS pages SPM space in/out at each context switch as required by each task  The time cost of paging is SRPD MSRS  Multitasking SPM  ...  blocks used by a task (evicting cache blocks, ECBs)  The set of cache blocks reused by a task (useful cache blocks, UCBs)  Various investigations in previous work* * see section II in the paper  ... 
doi:10.1109/rtss.2012.54 dblp:conf/rtss/WhithamDAAM12 fatcat:xxa5qf7nnnbuxdyyhi7xliborm

Toward a predictable and secure data cache algorithm: A cross-layer approach

Philippe Thierry, Laurent George, Jean-Franois Hermant, Fabien Germain, Dominique Ragot, Jean-Marc Lacroix
2011 2011 10th International Symposium on Programming and Systems  
In order to contribute to a data cache memory management algorithm for such hybrid system, this article defines properties needed at the same time by hard real-time systems and partitioned secure systems  ...  Nevertheless, the data cache usage causes in the same time hard real-time and security concerns. As a consequence, some realtime compliant data cache algorithms have been developed.  ...  In order to contribute to a data cache memory management algorithm for such hybrid system, this article defines properties needed at the same time by hard real-time systems and partitioned secure systems  ... 
doi:10.1109/isps.2011.5898894 fatcat:j6tukdpl7vebffkxrx3tcw5uee

Explicit Reservation of Local Memory in a Predictable, Preemptive Multitasking Real-Time System

Jack Whitham, Neil C. Audsley
2012 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium  
costs are simply added to the worst-case execution times (WCETs) of lower-priority tasks.  ...  We demonstrate that preemption has no effect on task execution times, and that the Carousel technique compares well to the conventional approach to handling interference, where worst-case interference  ...  Furthermore, Carousel blocks can be used as cache or SPM, which may be useful in mixed-criticality systems mixing hard real-time and non real-time tasks.  ... 
doi:10.1109/rtas.2012.19 dblp:conf/rtas/WhithamA12 fatcat:nzdrk3s2evd6pfhisya6qs7k3a

Fast context switches: compiler and architectural support for preemptive scheduling

Jeffrey S. Snyder, David B. Whalley, Theodore P. Baker
1995 Microprocessors and microsystems  
This paper addresses the possibility of reducing the overhead due to preemptive context switching in real-time systems that use preemptive scheduling.  ...  When context switches occur frequently, which is the case in some realtime systems, performing context switches at fast context switch points is found to signi cantly reduce the total number of memory  ...  Processes running in a real-time environment place more constraints on time. Process deadlines must be met, especially in the case of hard real-time systems.  ... 
doi:10.1016/0141-9331(95)93086-x fatcat:deylvnu62bhzpdvhzkzgwxrz3a

Implementation of Memory Centric Scheduling for COTS Multi-Core Real-Time Systems

Juan M. Rivas, Joël Goossens, Xavier Poczekajlo, Antonio Paolillo, Michael Wagner
2019 Euromicro Conference on Real-Time Systems  
However, the adoption of multi-core processors in the domain of real-time systems faces a series of challenges that has been the focus of great research intensity during the last decade.  ...  In this paper we aim to fill this gap, targeting cache based COTS multi-core systems.  ...  Another important factor in real-time systems is the variability of the execution times, also called jitter.  ... 
doi:10.4230/lipics.ecrts.2019.7 dblp:conf/ecrts/RivasGPP19 fatcat:4lfhjev62zgyhj2hyztyzmgpqa

Preemption Points Placement for Sporadic Task Sets

Marko Bertogna, Giorgio Buttazzo, Mauro Marinoni, Gang Yao, Francesco Esposito, Marco Caccamo
2010 2010 22nd Euromicro Conference on Real-Time Systems  
Limited preemption scheduling has been introduced as a viable alternative to non-preemptive and fullypreemptive scheduling when reduced blocking times need to coexist with an acceptable context switch  ...  In this paper, a method is presented for the optimal placement of preemption points under simplifying conditions, namely, a fixed preemption overhead at each point.  ...  due to cache interference could be as big as 655µs/2ms ≈ 33%.  ... 
doi:10.1109/ecrts.2010.9 dblp:conf/ecrts/BertognaBMYEC10 fatcat:sl54rcyu7jec5m4fjjl3vu5mey

Analysis and Implementation of Global Preemptive Fixed-Priority Scheduling with Dynamic Cache Allocation

Meng Xu, Linh Thi Xuan Phan, Hyon-Young Choi, Insup Lee
2016 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS)  
global FP algorithm but also outperforms the existing cache-aware non-preemptive global FP algorithm in most cases.  ...  Our evaluation also shows that gFPca outperforms the existing cache-aware non-preemptive global FP algorithm in most cases.  ...  INTRODUCTION Multicore processors are becoming pervasive, and it is becoming increasingly common to run real-time systems on a multicore platform.  ... 
doi:10.1109/rtas.2016.7461322 dblp:conf/rtas/XuPCL16 fatcat:2pfmrz6rtvgrbdplmm46hr2j7q

A Survey of Timing Verification Techniques for Multi-Core Real-Time Systems

Claire Maiza, Hamza Rihani, Juan M. Rivas, Joël Goossens, Sebastian Altmeyer, Robert I. Davis
2019 ACM Computing Surveys  
This survey provides an overview of the scientiic literature on timing veriication techniques for multi-core real-time systems.  ...  The survey highlights the key issues involved in providing guarantees of timing correctness for multi-core systems.  ...  The research that went into writing this paper was funded in part by the ESPRC grant MCCps (EP⁄P003664⁄1), the Innovate UK grant SECT-AIR (113099), and by the Ωallonia Region (Belgium) BEΩARE grant PARTITA  ... 
doi:10.1145/3323212 fatcat:mn6xmduiyjfgzhemn5s2lmfgje

Limited Preemptive Scheduling for Real-Time Systems. A Survey

Giorgio C. Buttazzo, Marko Bertogna, Gang Yao
2013 IEEE Transactions on Industrial Informatics  
The question whether preemptive algorithms are better than nonpreemptive ones for scheduling a set of real-time tasks has been debated for a long time in the research community.  ...  the system design.  ...  Integer Time Model In real-time operating systems, time instants and interval durations are measured by counting the number of clock cycles generated by a real-time clock, hence all timing values have  ... 
doi:10.1109/tii.2012.2188805 fatcat:xcxfk2lnffhzxpzd6s4clf6gne
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