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Making CSB+-Trees processor conscious

Philippe Bonnet
2005 Proceedings of the 1st international workshop on Data management on new hardware - DAMON '05  
Approach Identify processor sensitive indexparameters Study performance impact of parameters 0,05 0,1 0,15 0,2 0,25 ( 1 2 8 , 8 )  ... 
doi:10.1145/1114252.1114259 fatcat:kgkx4qcwrbec3l36ckh6qyriwe

Evaluating the Performance of CSB+-Trees on Multithreaded Architectures

Layali K. Rashid, Wessam M. Hassanein
2007 2007 Canadian Conference on Electrical and Computer Engineering  
CSB+-trees were introduced to speedup index structure operations, mainly the search and update.  ...  Our technique gains speedup ranging from 29% to 70% for dualthreaded CSB+-tree on an HT enabled platform compared to a single-thread version running on HT disabled architecture.  ...  Toward making B+-tree more cache conscious for inmemory indexing techniques, Rao and Ross [14] introduced Cache-Sensitive B+-tree (CSB+).  ... 
doi:10.1109/ccece.2007.379 fatcat:hw6cc7zaabcwlontjulozhuaoq

Effect of node size on the performance of cache-conscious B+-trees

Richard A. Hankins, Jignesh M. Patel
2003 Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '03  
To capture the impact of node size on the performance of a cache-conscious B+-tree (CSB+-tree), we first develop an analytical model based on the fundamental components of the search process.  ...  Both the analytical model and experiments confirm that using node sizes much larger than the cache line size can result in better search performance for the CSB+-tree.  ...  Since accessing data in main memory is "expensive" relative to the processor speeds, modern processors make use of processor caches.  ... 
doi:10.1145/781061.781063 fatcat:ixza5phjtrhgrbou7zfb3dwt4m

Effect of node size on the performance of cache-conscious B+-trees

Richard A. Hankins, Jignesh M. Patel
2003 Performance Evaluation Review  
To capture the impact of node size on the performance of a cache-conscious B+-tree (CSB+-tree), we first develop an analytical model based on the fundamental components of the search process.  ...  Both the analytical model and experiments confirm that using node sizes much larger than the cache line size can result in better search performance for the CSB+-tree.  ...  Since accessing data in main memory is "expensive" relative to the processor speeds, modern processors make use of processor caches.  ... 
doi:10.1145/885651.781063 fatcat:kariglpet5amjhq2gvuyuc3jzm

Effect of node size on the performance of cache-conscious B+-trees

Richard A. Hankins, Jignesh M. Patel
2003 Proceedings of the 2003 ACM SIGMETRICS international conference on Measurement and modeling of computer systems - SIGMETRICS '03  
To capture the impact of node size on the performance of a cache-conscious B+-tree (CSB+-tree), we first develop an analytical model based on the fundamental components of the search process.  ...  Both the analytical model and experiments confirm that using node sizes much larger than the cache line size can result in better search performance for the CSB+-tree.  ...  Since accessing data in main memory is "expensive" relative to the processor speeds, modern processors make use of processor caches.  ... 
doi:10.1145/781027.781063 dblp:conf/sigmetrics/HankinsP03 fatcat:2ljkgmeha5hvnjzxmj2c3m6r6u

Making B+- trees cache conscious in main memory

Jun Rao, Kenneth A. Ross
2000 SIGMOD record  
Cache conscious index structures such as Cache Sensitive Search Trees (CSS-Trees) perform lookups much faster than binary search and T-Trees.  ...  Although B + -Trees are more cache conscious than binary search and T-Trees, their utilization of a cache line is low since half of the space is used to store child pointers.  ...  Our goal is to make B + -Trees as cache conscious as CSS-Trees without increasing their update cost too much. We propose a new indexing technique called "Cache Sensitive B + -Trees" (CSB + -Trees).  ... 
doi:10.1145/335191.335449 fatcat:q7qa25fojfen7k2mljo5et6rwy

Making B+- trees cache conscious in main memory

Jun Rao, Kenneth A. Ross
2000 Proceedings of the 2000 ACM SIGMOD international conference on Management of data - SIGMOD '00  
Cache conscious index structures such as Cache Sensitive Search Trees (CSS-Trees) perform lookups much faster than binary search and T-Trees.  ...  Although B + -Trees are more cache conscious than binary search and T-Trees, their utilization of a cache line is low since half of the space is used to store child pointers.  ...  Our goal is to make B + -Trees as cache conscious as CSS-Trees without increasing their update cost too much. We propose a new indexing technique called "Cache Sensitive B + -Trees" (CSB + -Trees).  ... 
doi:10.1145/342009.335449 dblp:conf/sigmod/RaoR00 fatcat:qrh2luzornhmlafmsd2gvno62a

TLB misses

Petrie Wong, Ziqiang Feng, Wenjian Xu, Eric Lo, Ben Kao
2015 Proceedings of the 11th International Workshop on Data Management on New Hardware - DaMoN'15  
Adaptive Radix Tree (ART) is the most recent in-memory index structure.  ...  Examples of fast in-memory index include Cache-Sensivitve B + -Tree (CSB + -Tree) [15] , Fast Architecture Sensitive Tree (FAST) [9] , and Adaptive Radix Tree (ART) [11] .  ...  Workload-conscious Making data structures workloadconscious is another way to reduce hardware penalty.  ... 
doi:10.1145/2771937.2771942 dblp:conf/damon/WongFXLK15 fatcat:e5yr7cyya5bjplkurvxagnhst4

An Extended R-Tree Indexing Method Using Selective Prefetching in Main Memory [chapter]

Hong-Koo Kang, Joung-Joon Kim, Dong-Oh Kim, Ki-Joon Han
2007 Lecture Notes in Computer Science  
The SPR-Tree can produce wider nodes to optimize prefetching without additional modifications on the R-Tree. Moreover, the SPR-Tree can reduce the cache miss that can occur in the R-Tree.  ...  To solve these problems, this paper proposes the SPR-Tree (Selective Prefetching R-Tree), which is an extended R-Tree indexing method using selective prefetching according to node size in the main memory  ...  Cache Conscious Index Methods The CSB+-Tree is a variant of the B+-Tree, removing all child node pointers except the first child node pointer to store child nodes consecutively in order to reduce cache  ... 
doi:10.1007/978-3-540-72584-8_92 fatcat:qf2q5q5lkzbixblbdoyskk37ya

Interleaving with coroutines

Georgios Psaropoulos, Thomas Legler, Norman May, Anastasia Ailamaki
2017 Proceedings of the VLDB Endowment  
We showcase our proposal on SAP HANA by implementing binary search and CSB + -tree traversal for an instance of index join related to dictionary compression.  ...  Thus, we claim that coroutines make interleaving practical for use in real DBMS codebases.  ...  on the CSB + -tree.  ... 
doi:10.14778/3149193.3149202 fatcat:6oonx4tul5avbbn4kbfvnhyseu

Optimizing multidimensional index trees for main memory access

Kihong Kim, Sang K. Cha, Keunjoo Kwon
2001 SIGMOD record  
Recent studies have shown that cache-conscious indexes such as the CSB+-tree outperform conventional main memory indexes such as the T-tree.  ...  This paper proposes a cache-conscious version of the R-tree called the CR-tree.  ...  The UltraSPARC processors provide two registers for measuring processor events. We used the Perfmon tool to make these registers count L2 cache misses and to read the values stored in them.  ... 
doi:10.1145/376284.375679 fatcat:pgib57ntivdvlmz4yedljqzsr4

Optimizing multidimensional index trees for main memory access

Kihong Kim, Sang K. Cha, Keunjoo Kwon
2001 Proceedings of the 2001 ACM SIGMOD international conference on Management of data - SIGMOD '01  
Recent studies have shown that cache-conscious indexes such as the CSB+-tree outperform conventional main memory indexes such as the T-tree.  ...  This paper proposes a cache-conscious version of the R-tree called the CR-tree.  ...  The UltraSPARC processors provide two registers for measuring processor events. We used the Perfmon tool to make these registers count L2 cache misses and to read the values stored in them.  ... 
doi:10.1145/375663.375679 dblp:conf/sigmod/KimCK01 fatcat:6dtpzbrtqbdifneeat4qjpyhkq

Realizing parallelism in database operations

John Cieslewicz, Jonathan Berry, Bruce Hendrickson, Kenneth A. Ross
2006 Proceedings of the 2nd international workshop on Data management on new hardware - DaMoN '06  
A new trend in processor design is increased on-chip support for multithreading in the form of both chip multiprocessors and simultaneous multithreading.  ...  Recent research in database systems has begun to explore increased thread-level parallelism made possible by these new multicore and multithreaded processors.  ...  , CSB + -Trees, and column-wise or decomposed storage models [15, 16, 18, 19, 22] .  ... 
doi:10.1145/1140402.1140408 dblp:conf/damon/CieslewiczBHR06 fatcat:oantxsiljfabhe7jyikcni4u2e

Understanding and analysis of B+ trees on NVM towards consistency and efficiency

Jiangkun Hu, Youmin Chen, Youyou Lu, Xubin He, Jiwu Shu
2020 CCF Transactions on High Performance Computing  
However, All of them evaluate performance of B+ trees by applying an NVM performance simulator and can not provide concrete guidance on how to develop B+ trees with good performance on NVM.  ...  We discover that the performance of B+ trees is greatly affected by data formats.  ...  For example, to leave the B+ tree cache-conscious, CSB+-tree makes all the child nodes of a node contiguous in main memory (Rao and Ross 2000) , which incurs lots of NVM writes during the node split.  ... 
doi:10.1007/s42514-020-00022-z fatcat:65yz26lihrdfnixtxar4urqrfy

KISS-Tree

Thomas Kissinger, Benjamin Schlegel, Dirk Habich, Wolfgang Lehner
2012 Proceedings of the Eighth International Workshop on Data Management on New Hardware - DaMoN '12  
We achieve this by using a prefix tree that incorporates virtual memory management functionality and compression schemes.  ...  More specifically, we aim for the same performance as modern hash-based algorithms but keeping the order-preserving nature of trees.  ...  For example, the T-Tree [8] reduces the number of pointers of traditional AVL-trees [6] while the CSB+-Tree [11] is an almost pointer-free and thus cache-conscious variant of the traditional B+-Tree  ... 
doi:10.1145/2236584.2236587 dblp:conf/damon/KissingerSHL12 fatcat:o7qnna2n65ddvapqf6nc6bijf4
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