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libPRISM

Cristobal Ortega, Miquel Moreto, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose
2017 Proceedings of the International Conference on Supercomputing - ICS '17  
We use libPRISM to implement a policy that maximizes system performance without degrading energy e ciency by dynamically managing the SMT level and prefetcher hardware knobs of an IBM POWER8 system.  ...  In this paper, we propose libPRISM, an infrastructure that enables the transparent management of multiple hardware knobs in order to adapt the system to the evolving demands of hardware resources in di  ...  When reporting EDP, we report energy (taking idle power of the system into account) multiplied by execution time.  ... 
doi:10.1145/3079079.3079101 dblp:conf/ics/OrtegaMCBBEB17 fatcat:u3ozcghvtbgttdgu2n2mowtuq4

Runtime monitoring of software energy hotspots

Adel Noureddine, Aurelien Bourdon, Romain Rouvoy, Lionel Seinturier
2012 Proceedings of the 27th IEEE/ACM International Conference on Automated Software Engineering - ASE 2012  
OSlevel energy monitoring estimates the energy consumption of processes according to different hardware devices (CPU, network card).  ...  Concretely, our approach adopts a 2-layer architecture including OS-level and process-level energy monitoring.  ...  These two parts work along each other in order to provide accurate runtime energy information at the application level (threads and methods levels).  ... 
doi:10.1145/2351676.2351699 dblp:conf/kbse/NoureddineBRS12 fatcat:b24rtvl3yjg4zbt2gwby4j2wuu

ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers

Santhosh Kumar Rethinagiri, Oscar Palomar, Anita Sobe, Gulay Yalcin, Thomas Knauth, Rubén Titos Gil, Pablo Prieto, Malte Schneegaß, Adrian Cristal, Osman Unsal, Pascal Felber, Christof Fetzer (+1 others)
2015 Microprocessors and microsystems  
Wherever possible, ParaDIME will adopt multidisciplinary techniques, such as hardware support for message passing, runtime energy optimization utilizing new hardware energy performance counters, use of  ...  The major outcome of the project will be a noval processor architecture for a heterogeneous distributed system that utilizes future device characteristics, runtime and programming model for drastic energy  ...  The cost of spawning a thread can be very high and it is not cost effective if the task to execute is small.  ... 
doi:10.1016/j.micpro.2015.06.005 fatcat:inq37mlavzhzvog7jdnxk2dde4

The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution

Yangchun Luo, Wei-Chung Hsu, Antonia Zhai
2013 ACM Transactions on Architecture and Code Optimization (TACO)  
In the context of Thread-Level Speculation, we demonstrated that on a same-ISA heterogeneous multicore system, by dynamically deciding how on-chip resources are utilized, speculative threads can achieve  ...  With the emergence of multicore processors, various aggressive execution models have been proposed to exploit fine-grained thread-level parallelism, taking advantage of the fast on-chip interconnection  ...  In SPEC CPU2000 benchmarks, CMP-based configurations are rarely used due to their low level of thread-level parallelism.  ... 
doi:10.1145/2541228.2541233 fatcat:ek4cfgfxxzhprgdytcx6peg3ni

AccTEE

David Goltzsche, Manuel Nieke, Thomas Knauth, Rüdiger Kapitza
2019 Proceedings of the 20th International Middleware Conference on - Middleware '19  
We show how AccTEE uses automated code instrumentation for fine-grained resource accounting while maintaining confidentiality and integrity of code and data.  ...  Our evaluation of AccTEE in three scenarios -volunteer computing, serverless computing, and pay-by-computation for the web -shows a maximum accounting overhead of 10%.  ...  Nevertheless, the infrastructure provider has still the opportunity to implement an internal pricing model that takes all relevant cost factors (e.g. costs for management, energy, hardware) into account  ... 
doi:10.1145/3361525.3361541 dblp:conf/middleware/GoltzscheNKK19 fatcat:rbuex7jrpfh4dd5gficp7aqgwe

Intelligent Adaptation Of Hardware Knobs For Improving Performance and Power Consumption

Cristobal Ortega, Lluc Alvarez, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose, Miquel Moreto
2020 IEEE transactions on computers  
workloads. libPRISM can minimize execution time, energy-delay product or power consumption by dynamically managing the SMT level, the data prefetcher, and the DVFS hardware knobs.  ...  In this paper, we propose libPRISM, an infrastructure that enables the transparent management of multiple hardware knobs in order to adapt the system to the evolving demands of hardware resources in different  ...  This paper is: Approved for Public Release, Distribution Unlimited.  ... 
doi:10.1109/tc.2020.2980230 fatcat:degi77mqhbcwvmych7kjtkza74

Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors

Abhishek Bhattacharjee, Margaret Martonosi
2009 Proceedings of the 36th annual international symposium on Computer architecture - ISCA '09  
By running the predicted critical thread at the full clock rate and frequency-scaling non-critical threads, this approach achieves average energy savings of 15% while negligibly degrading performance for  ...  This paper proposes and evaluates simple but effective thread criticality predictors for parallel applications.  ...  Our experiments also account for the latency overhead in accessing the TCP hardware.  ... 
doi:10.1145/1555754.1555792 dblp:conf/isca/BhattacharjeeM09 fatcat:5mkw5it7mne5lnxwszq2t3tmuq

Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors

Abhishek Bhattacharjee, Margaret Martonosi
2009 SIGARCH Computer Architecture News  
By running the predicted critical thread at the full clock rate and frequency-scaling non-critical threads, this approach achieves average energy savings of 15% while negligibly degrading performance for  ...  This paper proposes and evaluates simple but effective thread criticality predictors for parallel applications.  ...  Our experiments also account for the latency overhead in accessing the TCP hardware.  ... 
doi:10.1145/1555815.1555792 fatcat:barphpqrnnegdhtpl3l2q3smly

Enhancing Resource Management Through Prediction-Based Policies [chapter]

Antoni Navarro, Arthur F. Lorenzon, Eduard Ayguadé, Vicenç Beltran
2020 Lecture Notes in Computer Science  
In this paper, we have extended a task-based runtime system with a lightweight monitoring and prediction infrastructure that dynamically predicts the optimal number of cores required for each application  ...  phase, thus improving both performance and energy efficiency.  ...  These unitary costs roughly represent the amount of time spent in the execution for each unit of cost of the task [15] . Then, we aggregate task costs per task type and runtime status separately.  ... 
doi:10.1007/978-3-030-57675-2_31 fatcat:yh26eu6pmvduxejpj5cen52mii

Tools and Methods for Measuring and Tuning the Energy Efficiency of HPC Systems

Robert Schöne, Jan Treibig, Manuel F. Dolz, Carla Guillen, Carmen Navarrete, Michael Knobloch, Barry Rountree
2014 Scientific Programming  
Energy costs nowadays represent a significant share of the total costs of ownership of High Performance Computing (HPC) systems.  ...  We further present interfaces in these suites that allow an automated tuning for energy efficiency and how these interfaces are used.  ...  ., FLOPS, IPC, MB/s), energy efficiency metrics focus on a trade-off between throughput (i.e., runtime) and energy costs (i.e., consumed energy).  ... 
doi:10.1155/2014/657302 fatcat:34dng6qrm5fo5mu5kw7qptgyde

The Italian research on HPC key technologies across EuroHPC

Marco Aldinucci, Giovanni Agosta, Antonio Andreini, Claudio A. Ardagna, Andrea Bartolini, Alessandro Cilardo, Biagio Cosenza, Marco Danelutto, Roberto Esposito, William Fornaciari, Roberto Giorgi, Davide Lengani (+5 others)
2021 Proceedings of the 18th ACM International Conference on Computing Frontiers  
High-Performance Computing (HPC) is one of the strategic priorities for research and innovation worldwide due to its relevance for industrial and scientific applications. We envision HPC as composed  ...  DF-Threads [18] is a low-level API which allows an efficient management of thread-level data flow; DF-Threads can outperform by more than one order of magnitude other wellknown similar APIs like the  ...  TAFFO allows fine-tuning the selection of data types, taking into account the cost of casting.  ... 
doi:10.1145/3457388.3458508 fatcat:nbnzfa2frvbpflj6tcbsk4bwcq

Monitoring in the Clouds: Comparison of ECO2Clouds and EXCESS Monitoring Approaches [article]

Pavel Skvortsov, Dennis Hoppe, Axel Tenschert, Michael Gienger
2016 arXiv   pre-print
In turn, the EXCESS project introduces new energy-aware execution models that improve energy-efficiency on a software level.  ...  The rationale behind monitoring is manifold: reasons include saving energy, lowering costs, and better maintenance.  ...  Optimizing the energy consumption on an application level requires a deep understanding of the runtime behavior of applications.  ... 
arXiv:1601.07355v1 fatcat:bicdjphignf2bptduio563fkq4

Experiences in autotuning matrix multiplication for energy minimization on GPUs

Hartwig Anzt, Blake Haugen, Jakub Kurzak, Piotr Luszczek, Jack Dongarra
2015 Concurrency and Computation  
In contrast to traditional autotuning and/or optimization for runtime performance only, we also take the energy efficiency into account.  ...  AUTOTUNING THE GPU DGEMM KERNEL FOR ENERGY EFFICIENCY Recently, metrics accounting for performance and energy efficiency have become popular [39] .  ...  We would also like to thank the Swiss National Computing Centre (CSCS) for granting access to their system and support in deploying the energy measurements.  ... 
doi:10.1002/cpe.3516 fatcat:jokssxq5pvcmbkulykx77corx4

FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo3 Framework

Alfonso Rodríguez, Juan Valverde, Jorge Portilla, Andrés Otero, Teresa Riesgo, Eduardo de la Torre
2018 Sensors  
This framework provides a hardware-based processing architecture, an automated toolchain, and a runtime to transparently generate and manage reconfigurable systems from high-level system descriptions without  ...  efficiency for computing-intensive algorithms with significant levels of data-level parallelism.  ...  The concept of hardware threads is studied in [39] as part of ReconOS, an OS for reconfigurable computing. Hardware threads are treated as additional processes by the OS.  ... 
doi:10.3390/s18061877 pmid:29890644 pmcid:PMC6022175 fatcat:p5tsuzns3nea5mgws4ul5gf5ha

System and Application Scenarios for Disaster Management Processes, the Rainfall-Runoff Model Case Study [chapter]

Antoni Portero, Štěpán Kuchař, Radim Vavřík, Martin Golasowski, Vít Vondrá
2014 Lecture Notes in Computer Science  
This article was supported by Operational Programme Education for Competitiveness and co-financed by the European Social Fund within the framework of the project New creative teams in priorities of scientific  ...  In the case when the runtime detects permanent errors in the infrastructure, the re-execution of the threads is performed in other healthy parts of the system.  ...  The idea behind this runtime is the fast fine-grain faulty threads re-execution. The runtime daemon has to detect the execution threads with errors in micro seconds.  ... 
doi:10.1007/978-3-662-45237-0_30 fatcat:njqoejk63nhlzcekmiiw3jr3ri
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