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Low-overhead fault-tolerant quantum computing using long-range connectivity
[article]
2021
arXiv
pre-print
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In our approach, quantum logic gates operate via logical Pauli measurements that preserve both the protection of the LDPC codes as well as the low overheads in terms of required number of additional ancilla ...
Compared with the surface code architecture, resource estimates for our scheme indicate order-of-magnitude improvements in the overheads for encoding and processing around one hundred logical qubits, meaning ...
used to measure Pauli operators with logical weight O( √ n). ...
arXiv:2110.10794v1
fatcat:rozeh7ouirhddis4cmw5hbcxki
THEORETICAL SETTING OF INNER REVERSIBLE QUANTUM MEASUREMENTS
2006
Modern Physics Letters A
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We also show that under some specific conditions it is possible to perform a unitary transformation on the state of the closed quantum system by means of a collection of generalized measurement operators ...
We show that any unitary transformation performed on the quantum state of a closed quantum system, describes an inner, reversible, generalized quantum measurement. ...
In fact, we showed that a quantum logic gate is a special case of (generalized) measurement operator. ...
doi:10.1142/s0217732306021827
fatcat:agdurjmkjrb7rnmhpd7sh5gwxe
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply
2000
IEEE Transactions on Very Large Scale Integration (vlsi) Systems
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CAL can also be operated from a dc power supply in a nonenergy-recovery mode compatible with standard CMOS logic. ...
The design and experimental evaluation of a clocked adiabatic logic (CAL) is described in this paper. CAL is a dual-rail logic that operates from a single-phase ac power-clock supply. ...
Energy was measured by measuring a voltage drop on a series resistor connected to the function generator. 2) For adiabatic operation with quasi-sinusoidal P ck generated using V B = 1:5 V and an external ...
doi:10.1109/92.863629
fatcat:bcq7inlyxjdkrmrlbuqmzbck3u
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply
1997
Proceedings of the 1997 international symposium on Low power electronics and design - ISLPED '97
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CAL can also be operated from a dc power supply in a nonenergy-recovery mode compatible with standard CMOS logic. ...
The design and experimental evaluation of a clocked adiabatic logic (CAL) is described in this paper. CAL is a dual-rail logic that operates from a single-phase ac power-clock supply. ...
Energy was measured by measuring a voltage drop on a series resistor connected to the function generator. 2) For adiabatic operation with quasi-sinusoidal P ck generated using V B = 1:5 V and an external ...
doi:10.1145/263272.263365
dblp:conf/islped/MaksimovicONC97
fatcat:oje7yaanuvc23fh4qg2wjkv5jq
Entangling logical qubits with lattice surgery
[article]
2020
arXiv
pre-print
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The correction capabilities come with an overhead for performing fault-tolerant logical operations on the encoded qubits. ...
One of the most resource efficient ways to implement logical operations is lattice surgery, where groups of physical qubits, arranged on lattices, can be merged and split to realize entangling gates and ...
A.4 (Logical operators) before and after LS.The fidelity of the generated state with respect to the logical Bell states can be estimated by measuring the expectation values of the three common stabilizersZ ...
arXiv:2006.03071v1
fatcat:uqcjyjzkdzfxzog7oo47irusqq
Topological wormholes
[article]
2019
arXiv
pre-print
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We show that these defects are capable of encoding logical qubits and can be used to perform all gates in the Clifford group. ...
David Poulin is a CIFAR Fellow with the Quantum Information Science program. ...
The logical X and Z operators will thus be referred to as needle-measurable operators. ...
arXiv:1909.07419v1
fatcat:b7vm7ns445d4fknl3ceio77cme
Logical blocks for fault-tolerant topological quantum computation
[article]
2021
arXiv
pre-print
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As a specific example, we propose fault-tolerant schemes based on surface codes concatenated with more general low-density parity check (LDPC) codes. ...
Focusing on channels based on surface codes, we introduce explicit, platform-independent representations of topological logic gates -- called logical blocks -- and generate new, overhead-efficient methods ...
Further, any any logical operator Q ∈ P n that commutes with P can be generated by traceable loop operators both contained within T P or outside of T P . ...
arXiv:2112.12160v1
fatcat:34cedldkqbbtphgt63ymmew6cq
Dynamically Generated Logical Qubits
2021
Quantum
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We present a quantum error correcting code with dynamically generated logical qubits. When viewed as a subsystem code, the code has no logical qubits. ...
Nevertheless, our measurement patterns generate logical qubits, allowing the code to act as a fault-tolerant quantum memory. ...
codes with dynamically generated logical qubits, or "Floquet codes." ...
doi:10.22331/q-2021-10-19-564
fatcat:ec6vuch2zvfyndbrgwttmwkasa
Transversal Clifford gates on folded surface codes
2016
Physical Review A
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We achieve and improve this result by constructing two families of folded surface codes with transversal Clifford gates. This construction is presented generally for qudits of any dimension. ...
However, the equivalence does imply the existence of constant-depth circuit implementations of logical Clifford gates on folded surface codes. ...
With the "data" qudits shown in Fig. 2 interleaved with "ancilla" qudits, a stabilizer generator can be measured using only 1-qudit operations and nearest-neighbor 2-qudit gates as shown in Fig. 3 . ...
doi:10.1103/physreva.94.042316
fatcat:kgb6mywpqzhblkpkrxtyfwyqrq
All-optical three-input logic minterms generation using semiconductor optical amplifier-based Sagnac interferometer
2013
Electronics Letters
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In this letter, 42 Gb/s three-input logic minterms are generated with a semiconductor optical amplifier (SOA)-based Sagnac interferometer. ...
All-optical three-input logic minterms are generated at 42 Gb/s with a Sagnac interferometer using cross-phase modulation in a semiconductor optical amplifier. ...
Although some simple logic gates with two inputs have already been realized using a Sagnac configuration, to the best of our knowledge, this is the first time that logic operations with more than two inputs ...
doi:10.1049/el.2013.1921
fatcat:25hvlp2a6va4bgh6z264imu2me
Simple scheme for encoding and decoding a qubit in unknown state for various topological codes
2015
Scientific Reports
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The protocol is local whenever in a given code the crossings between the logical operators consist of next neighbour pairs, which holds for the above codes. ...
We present a scheme for encoding and decoding an unknown state for CSS codes, based on syndrome measurements. ...
Logical operators of the code are those operators from P N which commute with all operators from G(S), but are not generated by them. Because S is abelian, logical operators are defined modulo G(S). ...
doi:10.1038/srep08975
pmid:25754905
pmcid:PMC4354078
fatcat:qyjcaixndnbm3c5cuiknd5cvwa
Fault-tolerance thresholds for the surface code with fabrication errors
2017
Physical Review A
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Instead, we show that in the presence of fabrication errors the syndrome can be determined using the supercheck operator approach and the outcome of the defective gauge stabilizer generators without any ...
The construction of topological error correction codes requires the ability to fabricate a lattice of physical qubits embedded on a manifold with a non-trivial topology such that the quantum information ...
The logical operators X L and Z L correspond to anticommuting strings that span the lattice, but each commutes with all the stabilizer generators. ...
doi:10.1103/physreva.96.042316
fatcat:p3mqqjimpra5xhhktjfdkt7oqq
Fault-Tolerant Gates on Hypergraph Product Codes
2021
Physical Review X
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Together with state injection, we can perform a universal set of gates within a single block of the class of hypergraph product codes. ...
With these features, they asymptotically offer a smaller overhead compared to topological codes. Here, we demonstrate how to perform Clifford gates on this class of codes using code deformation. ...
Any other Z-type operator that is supported in the interior anticommutes with the single-qubit X measurements used to generate the puncture and, therefore, is removed. ...
doi:10.1103/physrevx.11.011023
fatcat:ltkp43saqfc4ffd6iq57rx5hxm
Logical Majorana fermions for fault-tolerant quantum simulation
[article]
2021
arXiv
pre-print
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Our approach implements a universal set of fault-tolerant gates on these logical Majorana fermions by effecting encoded measurement-based topological quantum computing with them. ...
A critical feature of our approach is the use of code deformations between logical tetron and logical hexon surface-code-patch encodings, which enables one to move beyond the limitations of a wholly square-patch ...
Generally, the measurement of the fusion operators can yield non-trivial outcomes, which can be handled by adaptive logic, such as with a "forced measurement" protocol [24] or "Majorana frame tracking ...
arXiv:2110.10280v1
fatcat:db76jdkarrar5pi7oozqfru2bq
Fault-tolerant fermionic quantum computation based on color code
2018
Physical Review A
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2017 pre-print arXiv:1709.06245v1 fatcat:6p7d462m35cjxcupcgbo6to4qiOther Versions
We take a color code as an example to demonstrate the universal set of fault-tolerant operations on logical Majorana fermions, and we numerically find that the fault-tolerance threshold is about 0.8%. ...
Compared with the qubit quantum computation, the fermionic quantum computation has advantages in quantum simulations of fermionic systems, e.g. molecules. ...
The logical state is described using logical operators. Logical operators are also products of Majorana fermion operators, and they commute with all stabiliser generators. ...
doi:10.1103/physreva.98.012336
fatcat:kshwxelp4jestfihqomb7g6vdu
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