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Limits on speculative module-level parallelism in imperative and object-oriented programs on CMP platforms

F. Warg, P. Stenstrom
Proceedings 2001 International Conference on Parallel Architectures and Compilation Techniques  
This paper considers program modules, e.g. procedures, functions, and methods as the basic method to exploit speculative parallelism in existing codes.  ...  Our data complement previous limit studies by indicating that the programming style -object-oriented versus imperative -does not seem to have any noticeable impact on the achievable speedup.  ...  This research has been financially supported by the ARTES/PAMP program of the Swedish Foundation for Strategic Research (SSF) and by equipment grants from Sun Microsystems Inc. and the Swedish Council  ... 
doi:10.1109/pact.2001.953302 dblp:conf/IEEEpact/WargS01 fatcat:hizrlvjgyvdonfxzdganbmytei

CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs

Pierre Palatin, Yves Lhuillier, Olivier Temam
2006 Microarchitecture (MICRO), Proceedings of the Annual International Symposium on  
In this article, among the many issues associated with writing parallel programs, we focus on finding the appropriate parallelism granularity, and efficiently mapping tasks with complex control and data  ...  And writing parallel programs is a notoriously difficult task.  ...  Acknowledgments We would like to thank Sami Yehia, from ARM, for his support and many helpful suggestions.  ... 
doi:10.1109/micro.2006.13 dblp:conf/micro/PalatinLT06 fatcat:2e43ekij3zb2hizpllqyiz5u4u

A Survey on Thread-Level Speculation Techniques

Alvaro Estebanez, Diego R. Llanos, Arturo Gonzalez-Escribano
2016 ACM Computing Surveys  
Thread-Level Speculation (TLS) is a promising technique that allows the parallel execution of sequential code without relying on a prior, compile-time dependence analysis.  ...  In this work we introduce the technique, present a taxonomy of TLS solutions, and summarize and put into perspective the most relevant advances in this field.  ...  ACKNOWLEDGMENTS This research has been partially supported by MICINN (Spain) and ERDF program of the European Union: HomProg-HetSys project (TIN2014-58876-P), CAPAP-H5 network (TIN2014-53522-REDT), and  ... 
doi:10.1145/2938369 fatcat:yqqyjoaidvci3d4dyuw2jc2p2i

Creating portable and efficient packet processing applications

Olivier Morandi, Fulvio Risso, Pierluigi Rolando, Silvio Valenti, Paolo Veglia
2011 Design automation for embedded systems  
However, software development for these platforms is traditionally cumbersome due both to the lack of adequate programming abstractions and to the impossibility of reusing the same software on different  ...  Portability and efficiency are achieved altogether by virtualizing the hardware and by capturing in the programming model the peculiar characteristics of the application domain.  ...  ) colleagues who participated in the early days of this project, particularly Mario Baldi, Loris Degioanni and Gianluca Varenni who were part of the group of people who started the NetVM project back in  ... 
doi:10.1007/s10617-011-9072-8 fatcat:2fnuiaefyba25bxovdyi4zf46q

Dataflow execution of sequential imperative programs on multicore architectures

Gagan Gupta, Gurindar S. Sohi
2011 Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture - MICRO-44 '11  
It dynamically parallelizes the execution of suitably-written sequential programs, in a dataflow fashion, on multiple processing cores. Significantly, the execution is race-free and determinate.  ...  Multithreaded programming models that rely on statically-parallel programs have gained prevalence.  ...  The models can be deployed on a variety of CMPs or multithreaded processor platforms.  ... 
doi:10.1145/2155620.2155628 dblp:conf/micro/GuptaS11 fatcat:wgjvikjpfrfpjbv4ul2swmzcny

Hybrid Dataflow/von-Neumann Architectures

Fahimeh Yazdanpanah, Carlos Alvarez-Martinez, Daniel Jimenez-Gonzalez, Yoav Etsion
2014 IEEE Transactions on Parallel and Distributed Systems  
In this paper, we classify hybrid dataflow/von-Neumann models according to two different taxonomies: one based on the execution model used for inter-and intrablock execution, and the other based on the  ...  General purpose hybrid dataflow/von-Neumann architectures are gaining attraction as effective parallel platforms.  ...  Nevertheless, the von-Neumann computing model is able to exploit some limited instruction level parallelism (ILP), data level parallelism (DLP), and thread level parallelism (TLP).  ... 
doi:10.1109/tpds.2013.125 fatcat:rswr6zvvjjamxjjca6p2cfhh5y

A Survey of Techniques for Architecting and Managing Asymmetric Multicore Processors

Sparsh Mittal
2016 ACM Computing Surveys  
and parallel performance.  ...  In this paper, we present a survey of architectural and system-level techniques proposed for designing and managing AMPs.  ...  in parallel in a speculative manner.  ... 
doi:10.1145/2856125 fatcat:3hda47vtl5fznfvbskwcm2cbo4

Interlanguages and synchronic models of computation [article]

Alexander Victor Berka
2010 arXiv   pre-print
Distinct from dataflow, graph rewriting, and FPGA models, a-Ram instructions are bit level and execute in situ.  ...  At a high level of abstraction, modules exhibit a state transition system, aiding verification.  ...  A critique of object oriented programming from a spatial and interlinguistic perspective, is the subject of future research.  ... 
arXiv:1005.5183v1 fatcat:eiayu7sttbfslblhdoj3ggwnwu

Reconstructing Hardware Transactional Memory for Workload Optimized Systems [chapter]

Kunal Korgaonkar, Prabhat Jain, Deepak Tomar, Kashyap Garimella, Veezhinathan Kamakoti
2011 Lecture Notes in Computer Science  
The two-day technical program of APPT 2011 provided an excellent venue capturing the state of the art and practice in parallel architectures, parallel software and distributed and cloud computing.  ...  With the continuity of Moore's law in the multicore era and the emerging cloud computing, parallelism has been pervasively available almost everywhere, from traditional processor pipelines to large-scale  ...  However, our SPMMLIB can only support the C programming language at present. The dynamic creation of the objects in an object-oriented language such as C·· is more complex.  ... 
doi:10.1007/978-3-642-24151-2_1 fatcat:32cx745cn5cfdm5sbeah6eyiey

Software challenges in extreme scale systems

Vivek Sarkar, William Harrod, Allan E Snavely
2009 Journal of Physics, Conference Series  
Dr His research areas include advanced VLSI and nano technologies, non von Neumann models of programming and execution, parallel algorithms and applications, and their impact on massively parallel computer  ...  He also leads the UPC language effort, a consortium of industry and academic research institutions aiming to produce a unified approach to parallel C programming based on global address space methods.  ...  The notion of abstract collections in modern object-oriented languages can help bring some of the benefits of data parallelism from arrays and streams to pointer-based data structures.  ... 
doi:10.1088/1742-6596/180/1/012045 fatcat:iukutry2dvbitfdh6ng7kgz564

Copy-and-Patch Compilation: A fast compilation algorithm for high-level languages and bytecode [article]

Haoran Xu, Fredrik Kjolstad
2021 arXiv   pre-print
It is capable of lowering both high-level languages and low-level bytecode programs to binary code, by stitching together code from a large library of binary implementation variants.  ...  We have implemented an SQL database query compiler on top of this metaprogramming system and show that on TPC-H database benchmarks, copy-and-patch generates code two orders of magnitude faster than LLVM  ...  Yinzhan Xu for helpful comments, review, and references.  ... 
arXiv:2011.13127v2 fatcat:cijkjuhwp5foxidsmpsjptscxq

Transactional Memory, 2nd edition

Tim Harris, James Larus, Ravi Rajwar
2010 Synthesis Lectures on Computer Architecture  
It operates as a module for the Virtutech Simics platform.  ...  Parallelism is implicit and abundant in data parallel programs.  ...  , programming languages for parallel computing, tools for verifying program correctness, and techniques for compiler  ... 
doi:10.2200/s00272ed1v01y201006cac011 fatcat:25d3gvp5zrfqlgpzdzknqouofi

Memory leads the way to better computing

H.-S. Philip Wong, Sayeef Salahuddin
2015 Nature Nanotechnology  
William Harrod as Program Manager, under AFRL contract #FA8650-07-C-7724.  ...  i This page intentionally left blank. ii FOREWORD This document reflects the thoughts of a group of highly talented individuals from universities, industry, and research labs on what might be the challenges  ...  Module Level Cooling The main objective of module level cooling is to control the chip junction temperature in order to minimize potential failure mechanisms such as electro-migration, and to minimize  ... 
doi:10.1038/nnano.2015.29 pmid:25740127 fatcat:d6iiuuwcozbxlgn4kxxzdzwd4m

2015 AAPM Spring Clinical Meeting - Abstracts

2015 Journal of Applied Clinical Medical Physics  
In order to commission breath hold for motion management of SBRT, a six degrees-of-freedom motion platform and three-dimensional diode array were used.  ...  It currently works with MOSAIQ, Pinnacle, Eclipse, XiO, proton-XiO, and RayStation. Results The program is currently in use at 4 facilities. It has checked over 4000 plans.  ...  peripheral-most plane-parallel ionization detectors of the BC+ unit.  ... 
doi:10.1120/jacmp.v16i3.5634 pmid:28297261 pmcid:PMC5690110 fatcat:krog323vpfe6bkent7vugeqaqa

Deep Underground Science and Engineering Laboratory - Preliminary Design Report [article]

Kevin T. Lesko, Steven Acheson, Jose Alonso, Paul Bauer, Yuen-Dat Chan, William Chinowsky, Steve Dangermond, Jason A. Detwiler, Syd De Vries, Richard DiGennaro, Elizabeth Exter, Felix B. Fernandez, Elizabeth L. Freer, Murdock G. D. Gilchriese (+32 others)
2011 arXiv   pre-print
At the 7,400-feet level, the design incorporates one laboratory module and additional spaces for physics and Earth science efforts.  ...  To support underground research activities, the design includes two laboratory modules and additional spaces at a level 4,850 feet underground for physics, biology, engineering, and Earth science experiments  ...  This goal has been met, as the water level in the underground facility, as of January 1, 2011, is at the 5,331-foot level. The Project has been efficient and innovative in modifying the  ... 
arXiv:1108.0959v1 fatcat:7kuyj55k55gv3dfcby7mzosfaq
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