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Combining UML2 Application and SystemC Platform Modelling for Performance Evaluation of Real-Time Embedded Systems

Jari Kreku, Mika Hoppari, Tuomo Kestilä, Yang Qu, Juha-Pekka Soininen, Per Andersson, Kari Tiensyrjä
2008 EURASIP Journal on Embedded Systems  
We propose a layered UML application/workload and SystemC platform modelling approach that allow application and platform to be modelled at several levels of abstraction, which enables early performance  ...  Platform designer needs abstract application models for defining platform computation and communication capacities.  ...  CONCLUSIONS A layered UML application/workload and SystemC platform modelling approach for performance modelling and evaluation was described.  ... 
doi:10.1155/2008/712329 fatcat:6f75b2hc6vb47e2mloet5zsneu

UML2.0 Profiles for Embedded Systems and Systems On a Chip (SOCs)

Fateh Boutekkouk, Mohammed Benmohammed, Sebastien Bilavarn, Michel Auguin
2009 Journal of Object Technology  
The methodology is still under experimentation, and should prove its efficiency for more complex and realistic architectures [3] . UML PLATFORM  ...  We believe that if done correctly, the Unified Modeling Language (UML) can be such a language.  ...  The UML profile for SystemC can be used for the hardware description at the abstraction layers on top of the RTL layer. 8.  ... 
doi:10.5381/jot.2009.8.1.a1 fatcat:coirvylxd5amzmiwtz6ymxi6l4

System Level Design with UML: a Unified Approach

S. Rouxel, G. Gogniat, J-P. Diguet, J-L. Philippe, C. Moy
2006 2006 International Symposium on Industrial Embedded Systems  
to the scheduling and memory use analysis over an heterogeneous platform.  ...  It is based on the Unified Modeling Language (UML) and combines a Software Defined Radio UML profile for implementing a real MDA approach with EDA tools for multi-level verifications from the type compatibility  ...  The association between UML and SystemC is a promising approach, which is also explored in [18] . In this work, a UML SystemC profile is proposed and used to generate SystemC code.  ... 
doi:10.1109/ies.2006.357482 dblp:conf/sies/RouxelGDPM06 fatcat:wyn7xnyjj5bele73zreqs25spy

HeroeS: Virtual platform driven integration of heterogeneous software components for multi-core real-time architectures

Markus Becker, Ulrich Kiffmeier, Wolfgang Mueller
2013 16th IEEE International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC 2013)  
This includes host-compiled target SW abstraction, abstract RTOS and Hardware Abstraction Layer (HAL) models in SystemC, extended QEMU user and system mode emulation and TLM 2.0 bus models.  ...  For this, a SystemC virtual platform framework is presented combining state of the art simulation techniques according to the proposed methodology.  ...  Thus, our abstract RTOS and HAL models in SystemC provide an additional synchronization layer on top of the SystemC scheduler for modeling of preemptive SW processes.  ... 
doi:10.1109/isorc.2013.6913192 dblp:conf/isorc/BeckerK013 fatcat:td4gfdccerespbuxlfhh4ko7e4

SysRT: A modular multiprocessor RTOS simulator for early design space exploration

Jun Xiao, Andy Pimentel, Giuseppe Lipari
2017 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)  
The simulator contains different types of application models and a modular RTOS kernel model, all developed in SystemC.  ...  We demonstrate the flexibility of SysRT and its benefits for early DSE using experiments with a mixed workload executing on multiprocessor platforms with different numbers of cores.  ...  Application layer, OS kernel layer and architecture layer are implemented on top of the basic classes and primitives provided by SystemC.  ... 
doi:10.1109/samos.2017.8344609 dblp:conf/samos/XiaoPL17 fatcat:g5bjlbufrrdktlk24cp2xnyljm

Embedded Systems Development Tools: A MODUS-oriented Market Overview

Michalis Loupis
2014 Business Systems Research  
Methods/Approach: Embedded applications normally demand high resilience and quality, as well as conformity to quality standards and rigid performance.  ...  The industry has correctly identified the potential of this technology and has put its efforts into exploring its full potential.  ...  hardware/software Integrates external SystemC models SystemC -VHDL translator Native support of VHDL,Verilog, SystemVerilog and SystemC Full code coverage Post-simulation analysis Open TCL  ... 
doi:10.2478/bsrj-2014-0001 fatcat:x2yblzjbrrf2rh5bg3j76injuu

Flexible, Open and Efficient Embedded Multimedia Systems [chapter]

David de la Fuente, Jess Barba, Fernando Rincn, Julio Daniel, Juan Carlos
2012 Embedded Systems - High Performance Systems, Applications and Projects  
the use of executables models.  ...  The framework also follows a design approach based on MDA (Model Driver Architecture, [6]), in order to ease the design workflow (as it is stated in the "MDA manifest" [7]).  ...  Ying Wang et al [17] propose an MDA approach combining UML and SystemC in order to promote stepwise semiautomatic conversion from UML specification to executable SystemC code.  ... 
doi:10.5772/37614 fatcat:n4n7focvtrhpzasu6wuziaimb4

HLA-based Simulation Environment for distributed SystemC Simulation

Christoph Roth, Oliver Sander, Matthias Kühnle, Jürgen Becker
2011 Proceedings of the 4th International ICST Conference on Simulation Tools and Techniques  
The emphasis within this work is on the synchronization and time flow mechanisms that need to be applied when executing a single SystemC model in parallel.  ...  A case study is performed by means of a loosely-timed SystemC transaction level model of a homogenous Multi-Processor System-on-Chip.  ...  Fig. 7 shows the resulting layered implementation when using CERTI.  ... 
doi:10.4108/icst.simutools.2011.245520 dblp:conf/simutools/RothSKB11 fatcat:xdpc4wclqzhwdfeaqxxgxo66jq

Energy-aware parallelization flow and toolset for C code

Mihai T. Lazarescu, Albert Cohen, Adrien Guatto, Nhat Minn Lê, Luciano Lavagno, Antoniu Pop, Manuel Prieto, Andrei Terechko, Alexandru Sutii
2014 Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems - SCOPES '14  
UML is a common modeling language for high-level system design [19] .  ...  We used students from a second year course for the electronics engineering master (5th year overall) that covers modelling languages, such as SystemC, Esterel and Kahn Process networks, and the associated  ... 
doi:10.1145/2609248.2609264 dblp:conf/scopes/LazarescuCGLLPPTS14 fatcat:s4r2rkgq25hj5gwmuh6y3mcmpq

Mega-Modeling of complex, distributed, heterogeneous CPS systems

Eugenio Villar, Hector Posadas, Rafik Henia, Laurent Rioux
2020 Microprocessors and microsystems  
This paper proposes a UML/MARTE system modeling methodology able to address the challenges mentioned above by improving flexibility and scalability.  ...  System design must target different execution platforms with different OSs and HW resources, even bare-metal, support local and distributed systems, and integrate on top of these heterogeneous platforms  ...  Acknowledgments This work has been partially funded by the EU and the Spanish MICINN through the ECSEL MegaMart and Comp4Drones projects and the TEC2017-86722-C4-3-R PLATINO project.  ... 
doi:10.1016/j.micpro.2020.103244 fatcat:su7d3t6l4zhl5nxzmrui5vn7oq

Manycore simulation for peta-scale system design: Motivation, tools, challenges and prospects

Javad Zarrin, Rui L. Aguiar, João Paulo Barraca
2017 Simulation modelling practice and theory  
In this paper, we present the challenges for simulating future large scale manycore environments, and we investigate the adequacy of current modeling and simulation tools, methodologies and techniques.  ...  The emergence of peta-scale systems and the upcoming manycore era brings nevertheless new challenges to computing systems and architectures, adding further difficulties and requirements on the development  ...  At the higher level (M1), models (e.g. UML class diagrams) represent (abstract) these systems. Each model conforms to its metamodel defined at the upper level (M2).  ... 
doi:10.1016/j.simpat.2016.12.014 fatcat:j2acoyv235awfjkz6w7krvzh44

A SystemC-Based Design Methodology for Digital Signal Processing Systems

Christian Haubelt, Joachim Falk, Joachim Keinert, Thomas Schlichter, Martin Streubühr, Andreas Deyhle, Andreas Hadert, Jürgen Teich
2007 EURASIP Journal on Embedded Systems  
It combines the advantages of executability and analyzability of many important models of computation that can be expressed in SysteMoC.  ...  mapped onto FPGA-based platforms.  ...  The input specification is given as Kahn process networks modeled in UML. The Kahn processes are modeled using Statecharts.  ... 
doi:10.1155/2007/47580 fatcat:jmujswvvabaddghwgfdtzjqy6i

A SystemC-Based Design Methodology for Digital Signal Processing Systems

Christian Haubelt, Joachim Falk, Joachim Keinert, Thomas Schlichter, Martin Streubühr, Andreas Deyhle, Andreas Hadert, Jürgen Teich
2007 EURASIP Journal on Embedded Systems  
It combines the advantages of executability and analyzability of many important models of computation that can be expressed in SysteMoC.  ...  mapped onto FPGA-based platforms.  ...  The input specification is given as Kahn process networks modeled in UML. The Kahn processes are modeled using Statecharts.  ... 
doi:10.1186/1687-3963-2007-047580 fatcat:jynwpqyewbalddgnechvy4gbxm

Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach

Luciano Ost, Fernando Moraes, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Moller, Leandro Soares Indrusiak, Gilles Sassatelli, Pascal Benoit, Manfred Glesner, Michel Robert
2013 ACM Transactions on Embedded Computing Systems  
The mapping of tasks to processing elements of an MPSoC has critical impact on system performance and energy consumption.  ...  To cope with complex dynamic behavior of applications, it is common to perform task mapping during runtime so that the utilization of processors and interconnect can be taken into account when deciding  ...  Layer The platform layer provides multi-accuracy and executable platforms models, allowing designers to trade-off accuracy and simulation time.  ... 
doi:10.1145/2442116.2442125 fatcat:mzm6w5rufna3zay6hcag74qszm

Performance Analysis of Distributed Embedded Systems [chapter]

Ernesto Wandeler, Lothar Thiele
2005 Embedded Systems Handbook  
Examples for these different layers are cycle-accurate models, e.g. those used in the simulation of processors [3] , up to networks of discrete event components that can be modeled in SystemC.  ...  We still need to describe how a single workload stream and resource stream interact on a resource. The underlying model and analysis very much depends on the underlying execution platform.  ... 
doi:10.1201/9781420038163.ch15 fatcat:xya5efmwrzbzpjls3xdyfnsbva
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