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K-Ways Partitioning of Polyhedral Process Networks: A Multi-level Approach

Riccardo Cattaneo, Mahdi Badie Moradmand, Donatella Sciuto, Marco D. Santambrogio
2015 2015 IEEE International Parallel and Distributed Processing Symposium Workshop  
In this work we extend a wellknown graph partitioning technique, namely Multi-Level K-ways partitioning algorithm, in order to cope with such scenario.  ...  Process Networks(PNs)-based models of computation have proven as a successful framework for describing multiple kinds of applications in the Reconfigurable Hardware (RH) domain.  ...  CONCLUSIONS We presented a novel approach to partitioning a process network in the presence of simultaneous bandwidth and resource constraints, based on the Multi-Level, K-Ways approach already known in  ... 
doi:10.1109/ipdpsw.2015.17 dblp:conf/ipps/CattaneoMSS15 fatcat:vzw5jgdq3rfldmuarjq5rsvrgq

A branch-and-cut approach for minimum cost multi-level network design

Sunil Chopra, Chih-Yang Tsai
2002 Discrete Mathematics  
In this study, we develop algorithms that solve the multi-level network design problem to optimality.  ...  In our approach, the problem is converted to a Steiner tree problem and is solved by a branch-and-cut approach.  ...  The simplest form of multi-level network design problems is the Hierarchical Network Design (HND) problem where all nodes are spanned by a tree with a path between two given primary nodes on the network  ... 
doi:10.1016/s0012-365x(00)00404-0 fatcat:boc4eujzarfyjglvdpisrxbt5q

Data-aware process networks

Christophe Alias, Alexandru Plesco
2021 Proceedings of the 30th ACM SIGPLAN International Conference on Compiler Construction  
In this paper, we outline our experience towards the design of a complete polyhedral-powered approach for high-level synthesis (HLS) of supercomputing kernels to FPGA.  ...  Regular Process Networks Given a polyhedral program, we build a regular process network (RPN) with the following operations: • We partition the computation (iteration domains) into processes: if D denotes  ... 
doi:10.1145/3446804.3446847 fatcat:pyhil53nuzg2hk2dc7pbj7zh6q

Solving the bifurcated and nonbifurcated robust network loading problem with k -adaptive routing

Marco Silva, Michael Poss, Nelson Maculan
2018 Networks  
This routing scheme, with its corresponding k-partition of the uncertainty set, is dynamically defined under an iterative method to sequentially improve the solution.  ...  Named k-adaptive, it is based on the fact that the decision-maker chooses k second-stage solutions and then commits to one of them only after realization of the uncertainty.  ...  Each level of the tree defines a sequence of subsets that define a partition of D at that level.  ... 
doi:10.1002/net.21807 fatcat:prs3mladyjfgtnw2aar7duerbm

Combined Iterative and Model-driven Optimization in an Automatic Parallelization Framework

Louis-Noel Pouchet, Uday Bondhugula, Cedric Bastoul, Albert Cohen, J. Ramanujam, P. Sadayappan
2010 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis  
We demonstrate the effectiveness of this approach in terms of strong performance improvements on a single target as well as performance portability across different target architectures.  ...  Today's multi-core era places significant demands on an optimizing compiler, which must parallelize programs, exploit memory hierarchy, and leverage the ever-increasing SIMD capabilities of modern processors  ...  programs: Program optimization in a polyhedral model is a three stage process.  ... 
doi:10.1109/sc.2010.14 dblp:conf/sc/PouchetBBCRS10 fatcat:wtvly4ercbai3lo6t7ry4f7tee

A Systematic Approach to Blocking Convolutional Neural Networks [article]

Xuan Yang, Jing Pu, Blaine Burton Rister, Nikhil Bhagdikar, Stephen Richardson, Shahar Kvatinsky, Jonathan Ragan-Kelley, Ardavan Pedram, Mark Horowitz
2016 arXiv   pre-print
Using this model we automatically derive optimized blockings for common networks that improve the energy efficiency of custom hardware implementations by up to an order of magnitude.  ...  Convolutional Neural Networks (CNNs) are the state of the art solution for many computer vision problems, and many researchers have explored optimized implementations.  ...  Top: kernel partitioning broadcasts a shared input to separate cores, each of which processes a disjoint subset of the kernels to produce a disjoint slab of the output (in the K dimension).  ... 
arXiv:1606.04209v1 fatcat:eruinym6ozcpjpsaq3sza322da

Compiling affine loop nests for distributed-memory parallel architectures

Uday Bondhugula
2013 Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis on - SC '13  
Our framework is implemented as a source-level transformer that uses the polyhedral model, and generates parallel code with communication expressed with the Message Passing Interface (MPI) library.  ...  Compared to all previous approaches, ours is a significant advance either (1) with respect to the generality of input code handled, or (2) efficiency of communication code, or both.  ...  Polyhedral dependences: The data dependence graph (DDG) is a directed multi-graph with each vertex representing a statement, and an edge, e ∈ E, from node Si to Sj representing a polyhedral dependence  ... 
doi:10.1145/2503210.2503289 dblp:conf/sc/Bondhugula13 fatcat:xgwsrbdygbar3hqi2rtyadu54e

Code generation for parallel execution of a class of irregular loops on distributed memory systems

Mahesh Ravishankar, John Eisenlohr, Louis-Noel Pouchet, J. Ramanujam, Atanas Rountev, P. Sadayappan
2012 2012 International Conference for High Performance Computing, Networking, Storage and Analysis  
In this paper, we propose an approach for effective parallel execution of a class of irregular loop computations in a distributedmemory environment, using a combination of static and runtime analysis.  ...  The effectiveness of the framework is demonstrated on several benchmarks and a climate modeling application.  ...  ACKNOWLEDGMENTS We thank Umit Catalyurek for making available the PaToH software and for his help with formulating the partitioning constraints.  ... 
doi:10.1109/sc.2012.30 dblp:conf/sc/RavishankarEPRRS12 fatcat:nl2q52snera63falotlboplqvu

Compact multi-dimensional kernel extraction for register tiling

Lakshminarayanan Renganarayana, Uday Bondhugula, Salem Derisavi, Alexandre E. Eichenberger, Kevin O'Brien
2009 Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis - SC '09  
We show that by using COMDEX as a pre-processing to register tiling we can (i) enable register tiling on complex loop structures and (ii) realize a significant performance improvement on a variety of codes  ...  To achieve high performance on multi-cores, modern loop optimizers apply long sequences of transformations that produce complex loop structures.  ...  The input to the kernel extraction algorithm is a multi-level tiled (possibly imperfect) loop nest.  ... 
doi:10.1145/1654059.1654105 dblp:conf/sc/RenganarayanaBDEO09 fatcat:wcvfqonpr5h6rcyvuixudh26uu

On compile-time evaluation of process partitioning transformations for Kahn process networks

Sjoerd Meijer, Hristo Nikolov, Todor Stefanov
2009 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis - CODES+ISSS '09  
Kahn Process Networks is an appealing model of computation for programming and mapping applications onto multi-processor platforms.  ...  Process partitioning transformations can achieve a more balanced network improving the performance results significantly.  ...  To analyze the effects of different transformations we use a formal framework to which we refer as polyhedral process networks.  ... 
doi:10.1145/1629435.1629441 dblp:conf/codes/MeijerNS09 fatcat:xkaghwwu6fcovdaaoytyi6vkkq

Compiler-Assisted Data Distribution and Network Configuration for Chip Multiprocessors

Yong Li, A. Abousamra, R. Melhem, A. K. Jones
2012 IEEE Transactions on Parallel and Distributed Systems  
At run time, symbolic MMAPs are resolved and used by a partitioning algorithm to choose a partition of allocated memory blocks among the forked threads in the analyzed application.  ...  Additionally, by leveraging the communication pattern we can achieve a comparable performance to a system that leverages only the compiler generated partition and uses a complex centralized network configuration  ...  The study of multi-threaded code from a variety of program domains including scientific computing, multimedia, image processing and financial processing reveals that there are particular programming structures  ... 
doi:10.1109/tpds.2011.279 fatcat:nhq7im22xjazddsfmgrwdlxofe

Cross-layer optimized multipath routing for video communications in wireless networks

S. Kompella, Shiweri Mao, Y. Thomas Hou, H.D. Sherali
2007 IEEE Journal on Selected Areas in Communications  
Specifically, we consider how to perform multipath routing for multiple description (MD) video in a multi-hop wireless network.  ...  We show that this solution procedure is able to produce a set of routes whose objective value is within (1 − ) of the optimum.  ...  If there are K shared links, the aggregate failure process of these links is a Markov process with 2 K states.  ... 
doi:10.1109/jsac.2007.070518 fatcat:bjm2o66vsbgwfjtawjjp6xatqy

Deriving process networks from weakly dynamic applications in system-level design

Todor Stefanov, Ed Deprettere
2003 Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis - CODES+ISSS '03  
Process Networks are simple parallel processing models that match the emerging multi-processor architectures in the sense that the mapping of Process Network specifications of applications onto multi-processor  ...  We present an approach to the automatic derivation of executable Process Network specifications from Weakly Dynamic Applications.  ...  This research is supported by PROGRESS, the embedded systems and software research program of the Dutch organization of Scientific Research NWO, the Dutch Ministry of Economic Affairs and the Dutch Technology  ... 
doi:10.1145/944671.944673 fatcat:ba3c5ujd6neavj6obpvgmmhz7e

Deriving process networks from weakly dynamic applications in system-level design

Todor Stefanov, Ed Deprettere
2003 Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis - CODES+ISSS '03  
Process Networks are simple parallel processing models that match the emerging multi-processor architectures in the sense that the mapping of Process Network specifications of applications onto multi-processor  ...  We present an approach to the automatic derivation of executable Process Network specifications from Weakly Dynamic Applications.  ...  This research is supported by PROGRESS, the embedded systems and software research program of the Dutch organization of Scientific Research NWO, the Dutch Ministry of Economic Affairs and the Dutch Technology  ... 
doi:10.1145/944645.944673 dblp:conf/codes/StefanovD03 fatcat:qkqhijyqdjcuti2tscplghlziu

Optimization in telecommunication networks

Stan van Hoesel
2005 Statistica neerlandica (Print)  
We start with a short historical overview of the technological developments.  ...  Network design and network synthesis have been the classical optimization problems in telecommunication for a long time.  ...  Complete connectivity (full mesh) is hardly realizable nor a necessity, on any level of a network. On lower levels single connectivity generally suffices.  ... 
doi:10.1111/j.1467-9574.2005.00286.x fatcat:lnttizzrdbconfiwwhwbodjajy
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