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Iterated register coalescing
1996
Proceedings of the 23rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '96
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An important function of any register allocator is to target registers so as to eliminate copy instructions. Graph-coloring register allocation is an elegant approach to this problem. ...
Chaitin's coalescing heuristic could make a graph uncolorable (i.e., introduce spills); Briggs et al. demonstrated a conservative coalescing heuristic that preserves colorability. ...
Iterated Register Coalescing
· 303
Fig. 15. Execution speed. ...
doi:10.1145/237721.237777
dblp:conf/popl/GeorgeA96
fatcat:yhhoh3hj35etpgvazekk63vksy
Iterated register coalescing
1996
ACM Transactions on Programming Languages and Systems
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An important function of any register allocator is to target registers so as to eliminate copy instructions. Graph-coloring register allocation is an elegant approach to this problem. ...
Chaitin's coalescing heuristic could make a graph uncolorable (i.e., introduce spills); Briggs et al. demonstrated a conservative coalescing heuristic that preserves colorability. ...
Iterated Register Coalescing
· 303
Fig. 15. Execution speed. ...
doi:10.1145/229542.229546
fatcat:nghqqyg3tnhc3hqc3ejqjwmsjm
Coloring-based coalescing for graph coloring register allocation
2010
Proceedings of the 8th annual IEEE/ ACM international symposium on Code generation and optimization - CGO '10
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The coalesced graph is then colored again with the graph coloring register allocation. ...
In contrast, well-known iterated and optimistic coalescing algorithms, when combined with splitting, increase the cost by more than 20%. ...
Therefore, our coloring-based coalescing uses iterated coalescing both in the trial coloring and in the actual register allocation. ...
doi:10.1145/1772954.1772978
dblp:conf/cgo/OdairaNIKN10
fatcat:t4u5wp2h5zghrdsaud5lqy2mj4
Register coalescing techniques for heterogeneous register architecture with copy sifting
2009
ACM Transactions on Embedded Computing Systems
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coalescing that helps a register allocator. ...
Optimistic coalescing has been proven as an elegant and effective technique that provides better chances of safely coloring more registers in register allocation than other coalescing techniques. ...
ITERATED VS. OPTIMISTIC COALSECING Iterated coalescing uses a conservative coalescing scheme. ...
doi:10.1145/1457255.1457263
fatcat:gobrz2v7t5gm5asovjugiaf5q4
Register Allocation Via Coloring of Chordal Graphs
[chapter]
2005
Lecture Notes in Computer Science
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We present a simple algorithm for register allocation which is competitive with the iterated register coalescing algorithm of George and Appel. ...
Our experiments show that the new algorithm produces better results than iterated register coalescing for settings with few registers and comparable results for settings with many registers. ...
The Iterated register coalescing and our algorithm have similar running times. ...
doi:10.1007/11575467_21
fatcat:ltyxvikfwrfjte5k4qsdj4nwdy
Advanced conservative and optimistic register coalescing
2008
Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems - CASES '08
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The two main approaches are "iterated register coalescing" by George and Appel and "optimistic coalescing" by Park and Moon. The first one coalesces moves, one by one, in a conservative way. ...
Register coalescing is used, as part of register allocation, to reduce the number of register copies. ...
Optimistic coalescing takes its benefit from the aggressive phase and, despite its naive de-coalescing phase, outperforms iterated register coalescing. ...
doi:10.1145/1450095.1450119
dblp:conf/cases/BouchezDR08
fatcat:xumjrs7grzgw5odkbr52glgpgq
Optimistic register coalescing
2004
ACM Transactions on Programming Languages and Systems
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Unlike aggressive coalescing, which coalesces any pair of noninterfering copy-related nodes, conservative coalescing or iterated coalescing perform safe coalescing that preserves the colorability. ...
Graph-coloring register allocators eliminate copies by coalescing the source and target nodes of a copy if they do not interfere in the interference graph. ...
or iterated coalescing (see Section 6). ...
doi:10.1145/1011508.1011512
fatcat:uh57ovp6xfdpjgfiopnh54rxl4
Optimal spilling for CISC machines with few registers
2001
SIGPLAN notices
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The result is Pentium code that is 9.5% faster than code generated by SSA-based splitting with iterated register coalescing. ...
We then show a variant of Park and Moon's optimistic coalescing algorithm that does a very good (though not provably optimal) job of removing the register-register moves. ...
ALGORITHMS FOR COALESCING We have tried three approaches to the coalescing problem: iterated register coalescing [9] , integer linear programming, and optimistic coalescing [17] . ...
doi:10.1145/381694.378854
fatcat:e55vwc5j2rhkjkn7bvwhqrijba
Quantum Algorithm for Exact Monte Carlo Sampling
2010
Physical Review Letters
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2010 pre-print arXiv:1003.1862v1 fatcat:hi2gcb2cbbap5fcfqvzudk4zj4Other Versions
A second register holds the results of the successive application of the maps f t . Calculation of the iterates is done with the help of ancilla registers. ...
The circuit in Fig. 1 illustrates one step of the iteration algorithm before reset of the ancilla registers. ...
doi:10.1103/physrevlett.104.250502
pmid:20867354
fatcat:rqa65uysdnagzdsd2t3iwgacdq
Optimal spilling for CISC machines with few registers
2001
Proceedings of the ACM SIGPLAN 2001 conference on Programming language design and implementation - PLDI '01
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The result is Pentium code that is 9.5% faster than code generated by SSA-based splitting with iterated register coalescing. ...
We then show a variant of Park and Moon's optimistic coalescing algorithm that does a very good (though not provably optimal) job of removing the register-register moves. ...
ALGORITHMS FOR COALESCING We have tried three approaches to the coalescing problem: iterated register coalescing [9] , integer linear programming, and optimistic coalescing [17] . ...
doi:10.1145/378795.378854
dblp:conf/pldi/AppelG01
fatcat:mi62ruyftzadli3ullielmwq2e
Experimental evaluation and improvements to linear scan register allocation
2003
Software, Practice & Experience
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In a nutshell, our experience is that a well-tuned linear scan register allocator is a good choice on register-rich architectures. ...
In looking for a more well-behaved register allocator, we found out about the recently proposed linear scan register allocator [3] . ...
We thank Mikael Pettersson and the anonymous reviewers for comments on the article, Thorild Selén, Andreas Wallin, and IngemarÅberg for the initial implementation of the coalescing allocator. ...
doi:10.1002/spe.533
fatcat:pt35zffsdvehvccfmon2cnyuoe
Storage assignment optimizations through variable coalescence for embedded processors
2003
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems - LCTES '03
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In this paper, we propose a new approach of variable coalescence, which can reduce both instruction segment and data segment size and improve the utilization of automatic address register modification. ...
Variable coalescence is orthogonal to other solutions proposed; performing variable coalescence first and then solving the SOA or GOA problem with other techniques leads to excellent solutions. ...
Pre-iteration Coalescence Rules The pre-iteration rules are applied before we do iterative coalescing. Applying these rules will not worsen the SOA cost in all cases. ...
doi:10.1145/780761.780763
fatcat:lfy7yipxyfdl7pxwi2c3hw666y
Storage assignment optimizations through variable coalescence for embedded processors
2003
Proceedings of the 2003 ACM SIGPLAN conference on Language, compiler, and tool for embedded systems - LCTES '03
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In this paper, we propose a new approach of variable coalescence, which can reduce both instruction segment and data segment size and improve the utilization of automatic address register modification. ...
Variable coalescence is orthogonal to other solutions proposed; performing variable coalescence first and then solving the SOA or GOA problem with other techniques leads to excellent solutions. ...
Pre-iteration Coalescence Rules The pre-iteration rules are applied before we do iterative coalescing. Applying these rules will not worsen the SOA cost in all cases. ...
doi:10.1145/780732.780763
dblp:conf/lctrts/ZhuangLP03
fatcat:dszjstbyyvgwphwekmqymotfgi
Storage assignment optimizations through variable coalescence for embedded processors
2003
SIGPLAN notices
Preserved Fulltext
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The file type is application/pdf.
In this paper, we propose a new approach of variable coalescence, which can reduce both instruction segment and data segment size and improve the utilization of automatic address register modification. ...
Variable coalescence is orthogonal to other solutions proposed; performing variable coalescence first and then solving the SOA or GOA problem with other techniques leads to excellent solutions. ...
Pre-iteration Coalescence Rules The pre-iteration rules are applied before we do iterative coalescing. Applying these rules will not worsen the SOA cost in all cases. ...
doi:10.1145/780731.780763
fatcat:t62t7kuwafa7xcar5uwsuhhjru
An optimistic and conservative register assignment heuristic for chordal graphs
2007
Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems - CASES '07
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OCC is observed to eliminate at least as many dynamically executed copy instructions as iterated register coalescing (IRC) for a set of chordal interference graphs generated from several Mediabench and ...
Previous register assignment heuristics eliminate copy instructions via coalescing, in other words, merging nodes in the interference graph. ...
redesign the algorithms to become competitive with iterated register coalescing. ...
doi:10.1145/1289881.1289919
dblp:conf/cases/BriskVI07
fatcat:y534ekkjgfbnhdqdfm7nje7dce
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