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High-performance microprocessor design

P.E. Gronowski, W.J. Bowhill, R.P. Preston, M.K. Gowan, R.L. Allmon
<span title="">1998</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/cz5rf4o3ezafnl4kjpq643g32e" style="color: black;">IEEE Journal of Solid-State Circuits</a> </i> &nbsp;
Three generations of Alpha microprocessors have been designed using a proven custom design methodology. The performance of these microprocessors was optimized by focusing on high-frequency design.  ...  CAD tools were developed internally to support these designs. This paper discusses some of the technologies that have enabled Alpha microprocessors to achieve high performance.  ...  ACKNOWLEDGMENT The microprocessors described in this paper have resulted from the work of a tremendous number of people.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/4.668981">doi:10.1109/4.668981</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/572fe6sfifb7zg7za4bqesizii">fatcat:572fe6sfifb7zg7za4bqesizii</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20160509042521/http://web.stanford.edu:80/class/archive/ee/ee371/ee371.1066/handouts/gronowski_98.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/b6/1e/b61ecd2898660abcdf129ec30ad955945f97ab03.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/4.668981"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Superscalar instruction execution in the 21164 Alpha microprocessor

J.H. Edmondson, P. Rubinfeld, R. Preston, V. Rajagopalan
<span title="">1995</span> <i title="Institute of Electrical and Electronics Engineers (IEEE)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/gvjkwgwwvnakpbfssxpqjozbqm" style="color: black;">IEEE Micro</a> </i> &nbsp;
The 21164 is a new quad-issue, superscalar Alpha microprocessor that executes 1.2 billion instructions per second.  ...  This superscalar (quad-issue) processor is the second completely new implementation of Alpha.'~j (Digital Semiconductor introduced the 200-MHz 21064 in 1992 and the 275-MHz 21064A in 1994.)  ...  Acknowledgments We acknowledge the following for their work in producing estimates of SPEC benchmark performance: George Chrysos, Robert Cohn, Zarka Cvetanovic, Kent Glossop, Lucy Hamnett, Steve Hobbs,  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/40.372349">doi:10.1109/40.372349</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/mdhlbj6bazcbnle7xliudxbsm4">fatcat:mdhlbj6bazcbnle7xliudxbsm4</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170808222426/https://www.cis.upenn.edu/~milom/cis501-Fall05/papers/Alpha21164.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/a9/7d/a97d7670ac9f17284f2a3266621c097dcbeba156.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/40.372349"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

The case for a single-chip multiprocessor

Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Ken Wilson, Kunyung Chang
<span title="">1996</span> <i title="ACM Press"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/w47kezfuffdgvcobhv564rrlju" style="color: black;">Proceedings of the seventh international conference on Architectural support for programming languages and operating systems - ASPLOS-VII</a> </i> &nbsp;
This paper shows that in advanced technologies it is possible to implement a single-chip multiprocessor in the same area as a wide issue superscalar processor.  ...  For applications with large amounts of parallelism at both the fine and coarse grained levels, the multiprocessor microarchitectnre outperforms the superscrdar architecture by a significant margin.  ...  ., "A 200-MHz 64-b dual-issue CMOS microprocessor," IEEE Journal of Solid-State Circuits, VO1. 27, Pp. 1555-1557, 1992.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/237090.237140">doi:10.1145/237090.237140</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/asplos/OlukotunNHWC96.html">dblp:conf/asplos/OlukotunNHWC96</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/elff5i3fubd2thsx66mc56tfsu">fatcat:elff5i3fubd2thsx66mc56tfsu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170811002709/http://hpc.cs.tsinghua.edu.cn/research/zwm/reading/prof/asplos-7-olukotun.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d5/5f/d55f8a47bf14b6cfd869558225e1769becfccc09.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/237090.237140"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

The case for a single-chip multiprocessor

Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Ken Wilson, Kunyung Chang
<span title="1996-12-01">1996</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/i24hgue5erh4haqtfyyjvfijdu" style="color: black;">ACM SIGOPS Operating Systems Review</a> </i> &nbsp;
This paper shows that in advanced technologies it is possible to implement a single-chip multiprocessor in the same area as a wide issue superscalar processor.  ...  For applications with large amounts of parallelism at both the fine and coarse grained levels, the multiprocessor microarchitectnre outperforms the superscrdar architecture by a significant margin.  ...  ., "A 200-MHz 64-b dual-issue CMOS microprocessor," IEEE Journal of Solid-State Circuits, VO1. 27, Pp. 1555-1557, 1992.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/248208.237140">doi:10.1145/248208.237140</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/haj7x4knvfeftdhte35vryl7ry">fatcat:haj7x4knvfeftdhte35vryl7ry</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170811002709/http://hpc.cs.tsinghua.edu.cn/research/zwm/reading/prof/asplos-7-olukotun.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d5/5f/d55f8a47bf14b6cfd869558225e1769becfccc09.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/248208.237140"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

The case for a single-chip multiprocessor

Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Ken Wilson, Kunyung Chang
<span title="1996-09-01">1996</span> <i title="Association for Computing Machinery (ACM)"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/xu5bk2lj5rbdxlx6222nw7tsxi" style="color: black;">SIGPLAN notices</a> </i> &nbsp;
This paper shows that in advanced technologies it is possible to implement a single-chip multiprocessor in the same area as a wide issue superscalar processor.  ...  For applications with large amounts of parallelism at both the fine and coarse grained levels, the multiprocessor microarchitectnre outperforms the superscrdar architecture by a significant margin.  ...  ., "A 200-MHz 64-b dual-issue CMOS microprocessor," IEEE Journal of Solid-State Circuits, VO1. 27, Pp. 1555-1557, 1992.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/248209.237140">doi:10.1145/248209.237140</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/g2plt23b3vgtzii32m255gzt5i">fatcat:g2plt23b3vgtzii32m255gzt5i</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20170811002709/http://hpc.cs.tsinghua.edu.cn/research/zwm/reading/prof/asplos-7-olukotun.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/d5/5f/d55f8a47bf14b6cfd869558225e1769becfccc09.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1145/248209.237140"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> acm.org </button> </a>

A 200 MHz 32 b 0.5 W CMOS RISC microprocessor

R. Stephany, K. Anne, J. Bell, G. Cheney, J. Eno, G. Hoeppner, G. Joe, R. Kaye, J. Lear, T. Litch, J. Meyer, J. Montanaro (+7 others)
<i title="IEEE"> 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156) </i> &nbsp;
The range of operating points runs from 100 MHz at 1.65 V dissipating less than 300 mW to 200 MHz at 2.0 V for less than 900 mW.  ...  An on-chip PLL provides the internal clock based on a 3.68 MHz clock input. The chip contains 2.5 million transistors, 90% of which are in the two 16 kB caches.  ...  During his work on the Alpha 21164 CPU, he was a member of the design team for the memory management unit and contributed to the chip's clock design.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/isscc.1998.672451">doi:10.1109/isscc.1998.672451</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/rrrpqs4xvbcurlh4l7vpmfs3ha">fatcat:rrrpqs4xvbcurlh4l7vpmfs3ha</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20010726235325/http://research.compaq.com:80/wrl/DECarchives/DTJ/DTJP05/DTJP05PF.PDF" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/85/b9/85b99c1311c6e22e88439b5f166a15b7565f29f1.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/isscc.1998.672451"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> ieee.com </button> </a>

Video compression with parallel processing

Ishfaq Ahmad, Yong He, Ming L Liou
<span title="">2002</span> <i title="Elsevier BV"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/sv4mpg7lmfaqdp24ohp5qqiobm" style="color: black;">Parallel Computing</a> </i> &nbsp;
The paper covers a broad spectrum of such approaches, outlining the basic philosophy of each approach and providing examples.  ...  While the emphasis of this paper is on software-based methods, a significant discussion of hardware and VLSI is also included.  ...  High-end superscalar microprocessors include PowerPC620/604e, HP PA8000, MIPS R10000/5000 and Digital Alpha 21164.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/s0167-8191(02)00100-x">doi:10.1016/s0167-8191(02)00100-x</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/rmudbaphj5cfvowalnziuvwnwu">fatcat:rmudbaphj5cfvowalnziuvwnwu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20080419033415/http://ranger.uta.edu/~iahmad/journal-papers/%5BJ40%5D%20Video%20Compression%20using%20Parallel%20Processing.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/37/66/3766e015cb76d2bb562bcd43bf76707b2ab5b05f.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1016/s0167-8191(02)00100-x"> <button class="ui left aligned compact blue labeled icon button serp-button"> <i class="external alternate icon"></i> elsevier.com </button> </a>

Measurement and Modeling of Coupling Effects of CMOS On-Chip Co-Planar Inductors

J Kolding, T Mikkelsen, J Larsen, T Mikkelsen, T Kolding, Larsen
<span title="">1998</span> <i title="Kluwer Academic Publishers"> Microwave Journal </i> &nbsp; <span class="release-stage">unpublished</span>
PAGE iv PhD Dissertation The work presented in the dissertation is part of a larger research project running within the RF Integrated Systems & Circuits (RISC) Division, also Aalborg University.  ...  Based on link-simulations a correlation between DC-offset cancellation and Bit Error Ratio (BER) is established.  ...  A special thank-you to Michael Jenner of RF Micro-Devices for laser cutting the chips.  ... 
<span class="external-identifiers"> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/g6rmzp373jc2tgt6gjthn5nzwu">fatcat:g6rmzp373jc2tgt6gjthn5nzwu</a> </span>
<a target="_blank" rel="noopener" href="https://web.archive.org/web/20180414140737/http://vbn.aau.dk/files/47416401/phd_jhm.pdf" title="fulltext PDF download" data-goatcounter-click="serp-fulltext" data-goatcounter-title="serp-fulltext"> <button class="ui simple right pointing dropdown compact black labeled icon button serp-button"> <i class="icon ia-icon"></i> Web Archive [PDF] <div class="menu fulltext-thumbnail"> <img src="https://blobs.fatcat.wiki/thumbnail/pdf/72/4f/724fd6af11a695c4f49d9b4a36b8c0159a89babe.180px.jpg" alt="fulltext thumbnail" loading="lazy"> </div> </button> </a>