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Interface for heterogeneous kernels: A framework to enable hybrid OS designs targeting high performance computing on manycore architectures

Taku Shimosawa, Balazs Gerofi, Masamichi Takagi, Gou Nakamura, Tomoki Shirasawa, Yuji Saeki, Masaaki Shimizu, Atsushi Hori, Yutaka Ishikawa
2014 2014 21st International Conference on High Performance Computing (HiPC)  
This paper presents Interface for Heterogeneous Kernels (IHK), a general framework enabling hybrid kernel designs in systems equipped with manycore processors and/or accelerators.  ...  We describe IHK's interface and demonstrate its feasibility for hybrid kernel designs through executing various different lightweight OS kernels on top of it, which are specialized for certain types of  ...  ACKNOWLEDGEMENT This work is partially supported by feasibility study on advanced and efficient latency core-based architecture for future HPCI R&D funded by the Ministry of Education, Culture, Sports,  ... 
doi:10.1109/hipc.2014.7116885 dblp:conf/hipc/ShimosawaGTNSSS14 fatcat:47br6g3r6zdu3a6phqhowaet3q

MARS: Middleware for Adaptive Reflective Computer Systems [article]

Tiago Mück, Bryan Donyanavard, Biswadip Maity, Kasra Moazzemi, Nikil Dutt
2021 arXiv   pre-print
MARS consists of a generic user-level sensing/actuation interface that allows for portable policy design, and a reflective system model used to coordinate multiple policies.  ...  Self-adaptive approaches for runtime resource management of manycore computing platforms often require a runtime model of the system that represents the software organization or the architecture of the  ...  We would also like to acknowledge the critical review by Saehanseul Yi on the manuscript.  ... 
arXiv:2107.11417v1 fatcat:usx4vym7xfajpn7sduflbvykcm

Unifying manycore and FPGA processing with the RUSH architecture

Brandon Beresini, Scott Ricketts, Michael Bedford Taylor
2011 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)  
Maestro, the first rad-hard manycore processor, has the potential to enable new capabilities for space computation.  ...  For terrestrial applications, manycore processors have been adopted for a class of applications where both performance and flexible programmability are important metrics.  ...  Conclusion We have presented a heterogeneous computing architecture that provides a manycore substrate and FPGA substrate under a unified programming model.  ... 
doi:10.1109/ahs.2011.5963950 dblp:conf/ahs/BeresiniRT11 fatcat:hfkqzjly5vccpilrfx54jgvnhy

Exploring manycore architectures for next-generation HPC systems through the MANGO approach

José Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Etienne Cappe, Alessandro Cilardo, Leon Dragić, Alexandre Dray, Alen Duspara, William Fornaciari, Edoardo Fusella (+22 others)
2018 Microprocessors and microsystems  
for exploiting the computation resources of heterogeneous high performance computers.  ...  PEAK stands for Partitioned Enabled Architecture for Kilocores and it is a research manycore prototype for generic computing.  ... 
doi:10.1016/j.micpro.2018.05.011 fatcat:gf4jczkxgzcpfdbgqygmwbkwfq

Manycore simulation for peta-scale system design: Motivation, tools, challenges and prospects

Javad Zarrin, Rui L. Aguiar, João Paulo Barraca
2017 Simulation modelling practice and theory  
Abstract The architecture design of peta-scale computing systems is complex and presents lots of difficulties to designs, as current tools lack support for relevant features of future scenarios.  ...  The emergence of peta-scale systems and the upcoming manycore era brings nevertheless new challenges to computing systems and architectures, adding further difficulties and requirements on the development  ...  It is a full-system SystemC-based architecture simulator, enabling to model functional, performance, and power consumption aspects, as well as a complete OS for a Multi-Processor System-on-a-Chip (MP-SoC  ... 
doi:10.1016/j.simpat.2016.12.014 fatcat:j2acoyv235awfjkz6w7krvzh44

How Europe Is Preparing Its Core Solution for Exascale Machines and a Global, Sovereign, Advanced Computing Platform

Mario Kovač, Philippe Notton, Daniel Hofman, Josip Knezović
2020 Mathematical and Computational Applications  
One of EPI's core activities also takes place in the automotive sector, providing architectural solutions for a novel embedded high-performance computing (eHPC) platform and ensuring the overall economic  ...  The first three years drew processor and platform designers, embedded software, middleware, applications and usage experts from 10 EU countries together to co-design Europe's first HPC Systems on Chip  ...  for a new family of low-power European processors for extreme-scale computing, high-performance big data and a range of emerging applications.  ... 
doi:10.3390/mca25030046 fatcat:vsnp2imx4bf3pj3lgk2e7qoz3e


Muhammad Usman Ashraf
2019 International Journal of Advanced Research in Computer Science  
Leading to objectives, the current study presents a comprehensive analysis of existing strategies that can be considered to enhance performance and reducing power for emerging Exascale computing system  ...  Today's High-Performance Computing (HPC) systems require significant usage of "supercomputers" and extensiveparallel processing approaches for solving complicated computational tasks at the Petascale level  ...  It affords better performance than CUDA and enables portability to a broad field of computing architecture.  ... 
doi:10.26483/ijarcs.v10i2.6397 fatcat:k3l3lk5kuzhnldn5b2qzkh4eia

Paving the way for China exascale computing

Yutong Lu
2019 CCF Transactions on High Performance Computing  
Additionally, ongoing major R&D activities on next-generation supercomputing in China are introduced, and the possible solutions to achieve exascale computing, including co-design and convergence computing  ...  It has made a significant impact on scientific research, technology innovation, economic and social development, and the life of ordinary people.  ...  I also want to give my appreciation to the Chinese supercomputing research teams (such as Tianhe team, Sunway team, and others) for their unremitting efforts on the domestic supercomputing systems and  ... 
doi:10.1007/s42514-019-00010-y fatcat:vhj7b4nuenholkqmyzpd6sf3ey

Reverse Offload Programming on Heterogeneous Systems

Cheng Chen, Wenxiang Yang, Fang Wang, Dan Zhao, Yang Liu, Liang Deng, Canqun Yang
2019 IEEE Access  
To achieve high computation throughput, heterogeneous architectures utilize many specialpurpose cores to work as floating point computing coprocessors.  ...  In this paper, we present an overview of rOffload, including the basic programming interface and its implementation on a CPU-MIC system.  ...  • We show that rOffload can alleviate pressure on PCIe transfer and achieve positive evaluation in terms of overhead and performance based on benchmark testing.  ... 
doi:10.1109/access.2019.2891740 fatcat:fdikvmay7fg6npy7vaxuubrgqm

A survey on hardware-aware and heterogeneous computing on multicore processors and accelerators

Rainer Buchty, Vincent Heuveline, Wolfgang Karl, Jan-Philipp Weiss
2011 Concurrency and Computation  
We motivate the necessity of hardware-aware computing and summarize the challenges arising from high-performance heterogeneous computing.  ...  Performance gains for data-and compute-intensive applications can currently only be achieved by exploiting coarse-and fine-grained parallelism on all system levels, and improved scalability with respect  ...  Acknowledgements The Shared Research Group 16-1 received financial support by the Concept for the Future of Karlsruhe Institute of Technology in the framework of the German Excellence Initiative and the  ... 
doi:10.1002/cpe.1904 fatcat:fwg2vjaobral3b2v46vq4x2c3q

A Light-Weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures [chapter]

Rainer Buchty, David Kramer, Mario Kicherer, Wolfgang Karl
2009 Lecture Notes in Computer Science  
We therefore present a low-overhead technique enabling on-demand switching of individual functions; basically, this technique can be applied in two different manners.  ...  We will discuss the benefits of the individual implementations and show how both approaches can be used to establish code compatibility between different heterogeneous, reconfigurable, and parallel architectures  ...  As part of our effort on programming tools and environment targeting high-performance heterogeneous and reconfigurable computing, we therefore developed a lightweight approach enabling dynamic alteration  ... 
doi:10.1007/978-3-642-00454-4_9 fatcat:6m2fcpbkyne75fck37ddkxjzxq

A Framework for Software Diversification with ISA Heterogeneity

Xiaoguang Wang, SengMing Yeoh, Robert Lyerly, Pierre Olivier, Sang-Hoon Kim, Binoy Ravindran
2020 International Symposium on Recent Advances in Intrusion Detection  
In this paper, we propose HeterSec, a framework to secure applications utilizing a heterogeneous ISA setup composed of real world machines.  ...  To demonstrate the effectiveness of such a software framework, we implemented HeterSec on Linux and showcased its deployability by running it on a pair of x86_64 and ARM64 servers, connected over InfiniBand  ...  Acknowledgments We would like to thank the anonymous reviewers for their insightful comments.  ... 
dblp:conf/raid/0003YLOKR20 fatcat:pq7xir6rz5ggboue4lbhp5aapy


Chongxiao Cao, Jack Dongarra, Peng Du, Mark Gates, Piotr Luszczek, Stanimire Tomov
2014 Proceedings of the International Workshop on OpenCL 2013 & 2014 - IWOCL '14  
High performance is obtained through use of the high-performance OpenCL BLAS, hardware and OpenCL-specific tuning, and a hybridization methodology where we split the algorithm into computational tasks  ...  Further, we give an overview of the clMAGMA library, an open source, high performance OpenCL library that incorporates the developments presented, and in general provides to heterogeneous architectures  ...  Acknowledgments The authors would like to thank the National Science Foundation (award #0910735), the Department of Energy, and AMD for supporting this research effort.  ... 
doi:10.1145/2664666.2664667 dblp:conf/iwocl/CaoDDGLT14 fatcat:ghu4z4pjgvhmzm7u25pxsjywky

Scheduling for heterogeneous systems in accelerator-rich environments

Serif Yesil, Ozcan Ozturk
2021 Journal of Supercomputing  
In this work, we present a runtime management system designed for such heterogeneous systems with manycore accelerators.  ...  To process such datasets heterogeneous and manycore accelerators are being deployed in various computing systems to improve energy efficiency.  ...  Acknowledgement This work has been supported in part by a grant from Turkish Academy of Sciences and a grant from Türk Telekom (Project Number: 3015-04).  ... 
doi:10.1007/s11227-021-03883-5 fatcat:cidgimfm6zd57ikiftnce5y2ge

Survey of Methodologies, Approaches, and Challenges in Parallel Programming Using High-Performance Computing Systems

Paweł Czarnul, Jerzy Proficz, Krzysztof Drypczewski
2020 Scientific Programming  
Such detailed analysis has led us to the identification of trends in high-performance computing and of the challenges to be addressed in the near future.  ...  This paper provides a review of contemporary methodologies and APIs for parallel programming, with representative technologies selected in terms of target system type (shared memory, distributed, and hybrid  ...  Introduction In today's high-performance computing (HPC) landscape, there are a variety of approaches to parallel computing that enable reaching the best out of available hardware systems.  ... 
doi:10.1155/2020/4176794 fatcat:j52aegknyrdxzg2nopk73g3uly
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