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Integrated Cloud Application Provisioning: Interconnecting Service-Centric and Script-Centric Management Technologies [chapter]

Uwe Breitenbücher, Tobias Binz, Oliver Kopp, Frank Leymann, Johannes Wettinger
2013 Lecture Notes in Computer Science  
Especially combining proprietary management services with script-centric configuration management technologies is currently a major challenge.  ...  Fully-Automated provisioning is the key feature for Cloud computing. The script-centric technologies Puppet and Chef do not support this feature directly.  ...  The topology fragment contains (i) a graph of typed nodes that may be interconnected by typed relations and (ii) so called Management Annotations that are attached to the nodes or relations.  ... 
doi:10.1007/978-3-642-41030-7_9 fatcat:jksrlxmqcbe63lua2c3fqaiyii

Compatibility enhancement and performance measurement for socket interface with PCIe interconnections

Cheol Shim, Rupali Shinde, Min Choi
2019 Human-Centric Computing and Information Sciences  
As a result, multicore technologies of high-performance computing systems are emerging as systems interconnect technology, which is a technology for making multiple computers into one computer cluster.  ...  High-performance computing systems (Computer Clusters) using interconnect technology are essential where artificial intelligence, huge data, and SNS are required.  ...  Fig. 1 Percentage of interconnection-based high-performance computing.  ... 
doi:10.1186/s13673-019-0170-0 fatcat:cjdyb5nhanhzfms45ubrnzugha

Routability-driven repeater block planning for interconnect-centric floorplanning

P. Sarkar, Cheng-Kok Koh
2001 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  
In this paper we present a repeater block planning algorithm for interconnect-centric floorplanning.  ...  We introduce the concept of independent feasible regions for repeaters and derive an analytical formula for their computation.  ...  In this paper, we propose a routability-driven repeater block planning algorithm for interconnect-centric floorplanning.  ... 
doi:10.1109/43.920700 fatcat:id47mr3gpfeqnm5wlo54otwmqa

Repeater insertion and wire sizing optimization for throughput-centric VLSI global interconnects

Harshit Shah, Pun Shiu, Brian Bell, Mamie Aldredge, Namarata Sopory, Jeff Davis
2002 Computer-Aided Design (ICCAD), IEEE International Conference on  
This paper explores the tradeoffs between wire latency, throughput and area for deep submicron (DSM) interconnect technologies.  ...  CASE STUDY (L=1 cm, F=250nm) This case study compares a latency-centric and throughput-centric global interconnect design philosophy for 1 cm global line.  ...  For this particular examples, a throughput-centric design strategy indicates that the wire pitch for a one-centimeter global interconnect bus should be approximately half the dimension of a latency-centric  ... 
doi:10.1145/774572.774614 dblp:conf/iccad/ShahSBASD02 fatcat:vklrsqlrlnenjpwvplccz2zdwu

HiSIM: hierarchical interconnect-centric circuit simulator

Tsung-Hao Chen, Jeng-Liang Tsai, Charlie C-P Chen, T. Karnik
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004.  
To ensure the power and signal integrity of modern VLSI circuits, it is crucial to analyze huge amount of nonlinear devices together with enormous interconnect and even substrate parasitics to achieve  ...  For interconnect-centric applications, huge system matrices that contain linear and nonlinear elements have to be factorized in each NR iteration.  ...  Hence, in this paper we proposed an interconnect-centric circuit simulation method, which can handle nonlinear circuit simulation efficiently.  ... 
doi:10.1109/iccad.2004.1382627 dblp:conf/iccad/ChenTK04 fatcat:dbs5ruhqrzgzjnmc2zvzrnvi5u

Repeater insertion and wire sizing optimization for throughput-centric VLSI global interconnects

H. Shah, P. Shin, B. Bell, M. Aldredge, N. Sopory, J. Davis
IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002.  
This paper explores the tradeoffs between wire latency, throughput and area for deep submicron (DSM) interconnect technologies.  ...  CASE STUDY (L=l em, F=250nm) This case study compares a latency-centric and throughput-centric global interconnect design philosophy for 1 cm global l i e .  ...  For this particular examples, a throughput-centric design strategy indicates that the wire pitch for a one-centimeter global interconnect bus should be approximately harf the dimension of a latency-centric  ... 
doi:10.1109/iccad.2002.1167547 fatcat:i2lt6fpgybb7fcf4zid63t7are

Performance prediction of throughput-centric pipelined global interconnects with voltage scaling

Yulei Zhang, James F. Buckwalter, Chung-Kuan Cheng
2010 Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction - SLIP '10  
interconnect design [Shah 2002] become necessary because  Increasing demand for computing capacity  Emerging parallel computing architectures  More stringent throughput requirement of on-chip  ...  Throughput-Centric Interconnect Design Calculated from ITRS data or based on SPICE characterization  Define delay/energy dissipation of one repeater-wire segment Assumptions and Modeling  Assumptions  ... 
doi:10.1145/1811100.1811118 dblp:conf/slip/ZhangBC10 fatcat:4fbbakqb3fdh3mgicptftyb33m

Internet of things

Treffyn Lynch Koreshoff, Toni Robertson, Tuck Wah Leong
2013 Proceedings of the 25th Australian Computer-Human Interaction Conference on Augmentation, Application, Innovation, Collaboration - OzCHI '13  
pervasive computing) with models or ideas to tackle interconnectivity in future explorations.  ...  By widening the Internet from "a network of interconnected computers to a network of interconnected objects" (Commission of the European Communities 2009), the IoT will include a vast and intricate network  ... 
doi:10.1145/2541016.2541048 dblp:conf/ozchi/KoreshoffRL13 fatcat:c4heownofrfbhdgscau5oeefre

Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping

Amir Hormati, Nathan Clark, Scott Mahlke
2007 International Symposium on Code Generation and Optimization (CGO'07)  
Overall, our data-centric compilation techniques achieve on average 6.5%, and up to 12%, speed up over previous subgraph mapping algorithms for 8-bit accelerators.  ...  The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures.  ...  Finally, the data-centric algorithm is used to juxtapose the performance results between full-interconnect and sparse-interconnect CCAs.  ... 
doi:10.1109/cgo.2007.11 dblp:conf/cgo/HormatiCM07 fatcat:zz3vhz2fezenvec5rp2pgoaen4

On the benefits of resource disaggregation for virtual data centre provisioning in optical data centres

Albert Pagès, Rubén Serrano, Jordi Perelló, Salvatore Spadaro
2017 Computer Communications  
Despite such efforts on improving the performance of DCNs, current server-centric DCs still face some limitations toward efficient computing resource utilization.  ...  In this paper, we focus on the static planning of a shared optically interconnected disaggregated DC infrastructure to support a known set of VDC instances to be deployed on top.  ...  Server-centric scenario To start, we consider a legacy server-centric architecture for benchmark purposes, where computing resources are organized in servers.  ... 
doi:10.1016/j.comcom.2017.03.009 fatcat:22qe6d5bsvguxp5cg3te75sty4

The stellar transformation: From interconnection networks to datacenter networks

Alejandro Erickson, Iain A. Stewart, Javier Navaridas, Abbas E. Kiasari
2017 Computer Networks  
We demonstrate that under our transformation, numerous interconnection networks yield datacenter network topologies with potentially good, and easily computable, baseline properties.  ...  , along with their networking properties and routing algorithms, into viable dual-port server-centric datacenter network topologies.  ...  Tori (also known as toroidal meshes) have been widely studied as interconnection networks; indeed, tori form the interconnection networks of a range of distributed-memory multiprocessor computers (see,  ... 
doi:10.1016/j.comnet.2016.12.001 fatcat:mcsyoqbmybbgdgq375xg5a5p2y

The network is the chip

G. Martin
2005 IEEE Design & Test of Computers  
A FEW YEARS AGO, Sun Microsystems used the slogan, "the network is the computer," to promote its products and to alert people to a profound change in computing-use models.  ...  Interconnect-Centric Design for Advanced SoC and NoC, by editors Jari Nurmi, Hannu Tenhunen, Jouni Isoaho, and Axel Jantsch (Springer, 2004, ISBN 1-4020-7835-8, 453 pp., $135) , is a useful tool to help  ...  Moving from function-centric to NoC design requires an orthogonal change in design approach: the starting point is a network of collaborating functional blocks; interconnect is no longer just an afterthought  ... 
doi:10.1109/mdt.2005.48 fatcat:qhq6irfgcbh2jpvbvljpnne5uy

Memory subsystem architecture design for multimedia applications

Alexsandro C. Bonatto, Altamiro A. Susin
2013 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)  
This paper proposes to integrate the SoC modules using an intelligent memory controller, in a memory-centric design approach.  ...  CONCLUSIONS This work presents a memory-centric design strategy to interconnect clients with different data access requirements to the memory port guaranteeing quality of service.  ...  INTRODUCTION Memory performance is a limiting factor of computer system efficiency and is the bottleneck in current multimedia processing systems.  ... 
doi:10.1109/isvlsi.2013.6654645 dblp:conf/isvlsi/BonattoS13 fatcat:5iplaxmcirfujnyob5ijuzoji4

Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture

R. Gauchi, M. Kooli, P. Vivet, J.-P. Noel, E. Beigne, S. Mitra, H.-P. Charles
2019 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)  
By exploring multi-tile SRAM Place&Route in 28nm FD-SOI, we explore the respective performance, energy and cost of memory interconnect.  ...  For embedded computing, In-Memory Computing scheme presents advantageous computing and energy gains for certain class of applications.  ...  CONCLUSION Architectures implementing data centric computing improve throughput performance but change the architecture.  ... 
doi:10.1109/vlsi-soc.2019.8920373 dblp:conf/vlsi/GauchiKVNBMC19 fatcat:q7msihkiwbaydan53juosz4eqy

A Novel Architecture of Telecommunication Networks for Next Generation Internet

Fengchen Qian, Yalin Ye, Ning Shan, Bing Su, J. Heled, A. Yuan
2018 MATEC Web of Conferences  
Traditional computer networks and telecom networks meet many challenges in high-quality service, innovation, evolution, and management.  ...  The DC-centric telecom network is a widely-distributed data center network (DCN), which is composed of thousands of public or private DCs.  ...  DC-centric telecom network allows software developers or DC user to utilize network resources in the same easy manner as they do on storage and computing resources [16] .  ... 
doi:10.1051/matecconf/201817303036 fatcat:ouzgoe3iqnhrfknpodzx23r4wi
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