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Multilanguage design of heterogeneous systems

P. Coste, F. Hessel, Ph. Le Marrec, Z. Sugar, M. Romdhani, R. Suescun, N. Zergainoh, A. A. Jarraya
1999 Proceedings of the seventh international workshop on Hardware/software codesign - CODES '99  
Multilanguage solutions are required for the design of heterogeneous systems where different parts belong to different application classes e.g. control/data or continuous/discrete.  ...  This paper discusses the basic concepts of multilanguage design and introduces MUSIC a Multilanguage design approach.  ...  Most of existing tools in this area provides few refinements and they start the design at quite a low level e.g. RTL for Hardware and C language for Software.  ... 
doi:10.1145/301177.301206 dblp:conf/codes/CosteHLSRSZJ99 fatcat:2brhnc5tdjfupkqlksr3bkdwey

Hardware — Software co-design of embedded telecommunication systems [chapter]

N. S. Voros, S. Tsasakou, C. Valderrama, S. Arab, A. Birbas, M. Birbas, V. Mariatos, A. Andritsou
1998 IFIP Advances in Information and Communication Technology  
The methodology has been applied for the design and implementation of a MAC layer protocol, named MASCARA, for providing A TM QoS over wireless connections.  ...  It defines a platfonn that integrates different notations and, the necessary mechanisms to handle different in nature models in a coherent way.  ...  integration steps at the lower levels of the development cycle.  ... 
doi:10.1007/978-0-387-35394-4_24 fatcat:hllxpix4y5h73af3qyn5bjduke

Towards interprocess communication and interface synthesis for a heterogeneous real-time rapid prototyping environment

Franz Fischer, Annette Muth, Georg Fäber
1998 Proceedings of the sixth international workshop on Hardware/software codesign - CODES/CASHE '98  
in an automated design process.  ...  This paper presents concept and implementation of IPC functions which, implementing the message queue semantics of the specification language SDL, links the standard components of our multiprocessor system  ...  intended to support hardware design on a high abstraction level [4] .  ... 
doi:10.1145/278241.278294 dblp:conf/codes/FischerMF98 fatcat:ybwcs4ne5neldbbjjzw4rmu3ei

Hardware/software codesign and rapid prototyping of embedded systems

F. Slomka, M. Dorfel, R. Munzenberger, R. Hofmann
2000 IEEE Design & Test of Computers  
Hardware can now be simulated at different levels (e.g., electrical circuits, logic Hardware/Software Codesign and Rapid Prototyping of Embedded Systems Embedded Systems with SDL/MSC 28 This article describes  ...  Due to the cost requirements and the timing constraints of such systems, application-specific hardware solutions are often needed, making the codesign of hardware and software a major topic for the design  ...  gates, or register-transfer level) or behavioral very high speed integrated-circuit (VHSIC) hardware description language (VHDL) descriptions.  ... 
doi:10.1109/54.844331 fatcat:7wla7cdyifeenb6wwfrwclbkaq

Hardware/software co-design of an ATM network interface card

Jean-Marc Daveau, Gilberto Marchioro, Ahmed Amine Jerraya
1998 Proceedings of the sixth international workshop on Hardware/software codesign - CODES/CASHE '98  
The architecture exploration is made using Cosmos, a co-design tool for multiprocessor architecture. Several architectures are produced starting from the same initial SDL specification.  ...  This paper describes the experiment and the lessons learned about the capabilities and the restrictions of Cosmos and SDL.  ...  when compared to lower level models such as C and VHDL; 3-The use of co-design tools such as Cosmos allows for fast design space exploration starting from high-level description.  ... 
doi:10.1145/278241.278316 dblp:conf/codes/DaveauMJ98 fatcat:3xtnzli5tjffvfjk3pssjnfhse

Multilanguage Specification for System Design [chapter]

A. A. Jerraya, M. Romdhani, Ph. Marrec, F. Hessel, P. Coste, C. Valderrama, G. F. Marchioro, J. M. Daveau, N.-E. Zergainoh
1999 System-Level Synthesis  
However, its expression power is quite low for communication and data structure. SDL may be a realistic choice for system specification. SDL provides acceptable facilities for most criteria.  ...  There are mainly two synchronization modes; the synchronous mode and the asynchronous mode. When message passing VHDL provides an excellent cost of use.  ...  Introduction This chapter discusses specification languages and intermediate models used for system-level design.  ... 
doi:10.1007/978-94-011-4698-2_3 fatcat:xjrihqmg7bczjlwr2eoaezpxsa

Transformational partitioning for co-design of multiprocessor systems

Marchioro, Daveau, Jerraya
1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD) ICCAD-97  
The application of this approach is illustrated using a design example starting from a system-level speci cation given in SDL to a distributed hardware software a r chitecture described in C VHDL.  ...  This paper presents the underlying methodology of Cosmos, an interactive approach for hardware software c o-design capable of handling multiprocessor systems and distributed a r chitectures.  ...  The co-design starts with a system-level speci cation given in SDL.  ... 
doi:10.1109/iccad.1997.643585 dblp:conf/iccad/MarchioroDJ97 fatcat:yvmwlxxcfzfr5iozxsaecpal5e

MCI — Multilanguage Distributed Co-Simulation Tool [chapter]

F. Hessel, P. Marrec, C. A. Valderrama, M. Romdhani, A. A. Jerraya
1999 Distributed and Parallel Embedded Systems  
The proposed tool is used to assist the design (If an adaptive speed control system that was described in three different languages (VHDL. SDL and MatLab J. F. J.  ...  Nowadays the design of complex systems requires the cooperation of several teams belonging to different cultures and using different languages.  ...  The send module is a SDL system and the receive module is a VHDL system. The SDL system sends a data to the VHDL system.  ... 
doi:10.1007/978-0-387-35570-2_17 fatcat:uprx4ehhhrg35nv4syasj4ewli

A Comparison of Six Languages for System Level Description of Telecom Applications [chapter]

Axel Jantsch, Shashi Kumar, Ingo Sander, Bengt Svantesson, Johnny Öberg, Ahmed Hemani, Peeter Ellervee, Mattias O'Nils
2001 Electronic Chips & Systems Design Languages  
The languages under evaluation are VHDL, C++, SDL, Haskell, Erlang, and ProGram.  ...  The evaluation method allows to give specific emphasis on particular aspects in a controlled way, which we use to make separate comparisons for pure software systems, pure hardware systems and mixed HW  ...  object oriented languages; C++, SDL, Erlang, and Haskell have mostly been used for software development; VHDL and ProGram have been used for hardware development.  ... 
doi:10.1007/978-1-4757-3326-6_15 fatcat:xlrppy5pxbeu7mvqmaquyquveq

Hardware Specification Generated from Estelle [chapter]

Jacek Wytrębowicz
1996 IFIP Advances in Information and Communication Technology  
A specification written in the ISO standardized Estelle language can be translated into the standard hardware description language VHDL.  ...  VHDL is considered as an intermediate step, using of the existing simulation and synthesis tools.  ...  For different designing stages we use system level, software and hardware specification languages.  ... 
doi:10.1007/978-0-387-34892-6_27 fatcat:w3v7s5nffrf3lpijmol736hwiq

Advanced Prototype Platform For A Wireless Multimedia Local Area Network

Kimmo Tikkanen, Marko Hannikainen, Timo Hamalainen, Jukka Saarinen
2015 Zenodo  
The logic inside the interface is designed with Very high-speed integrated circuit Hardware Description Language (VHDL), which ensures convenient high-level description of hardware functions and fast reprogramming  ...  For TUTWLAN prototyping, a Medium Access Control (TUTMAC) protocol has been designed and implemented with a formal, high abstraction level Specification and Description Language (SDL) [6] .  ... 
doi:10.5281/zenodo.37205 fatcat:razejq7nkjazdfvzagqn5gndce

Fast prototyping

Benoit Clement, Richard Hersemeule, Etienne Lantreibecq, Bernard Ramanadin, Pierre Coulomb, Francois Pogodalla
1999 Proceedings of the 36th ACM/IEEE conference on Design automation conference - DAC '99  
This paper describes a new design flow that significantly reduces time-to-market for highly complex multiprocessor-based System-On-Chip designs.  ...  This flow, called Fast Prototyping, enables concurrent hardware and software development, early verification and productive re-use of intellectual property.  ...  ACKNOWLEDGEMENTS We wish to thank here all groups and people involved in this development, with special attention to CoWare, Gerard Mas, Andre Picco, Marco Carilli, Roberto Fantechi.  ... 
doi:10.1145/309847.309971 dblp:conf/dac/ClementHLRCP99 fatcat:wkdwm6bstjfhfcksh66yz2hshu

TASTE: A Real-Time Software Engineering Tool-Chain Overview, Status, and Future [chapter]

Maxime Perrotin, Eric Conquet, Julien Delange, André Schiele, Thanassis Tsiodras
2011 Lecture Notes in Computer Science  
complex systems difficult to integrate and validate.  ...  TASTE relies on two complementary languages, AADL and ASN.1, that allow to create embedded systems which functional parts are made of C, Ada, SDL, SCADE, Simulink and/or VHDL code.  ...  complex systems difficult to integrate and validate.  ... 
doi:10.1007/978-3-642-25264-8_4 fatcat:fyfrdxcvkjg5dfa6753tqj2coi

Towards design and validation of mixed-technology SOCs

S. Mir, B. Charlot, G. Nicolescu, P. Coste, F. Parrain, N. Zergainoh, B. Courtois, A. Jerraya, M. Rencz
2000 Proceedings of the 10th Great Lakes Symposium on VLSI - GLSVLSI '00  
A high level multilanguage/multi-engine approach is used for system specification and co-simulation.  ...  This paper illustrates an approach to design and validation of heterogeneous systems.  ...  Languages such as SDL, Statechart, C, VHDL or C++ are used for the specification of both hardware and software.  ... 
doi:10.1145/330855.330950 dblp:conf/glvlsi/MirCNCPZCJR00 fatcat:awxvh2hsazcfrjawmc34nj3r4y

Computer assisted design and integration of FPGA accelerators in aerospace systems

Marco Lattuada, Fabrizio Ferrandi, Maxime Perrotin
2016 2016 IEEE Aerospace Conference  
The integration of Field Programmable Gate Arrays (FPGAs) in an aerospace system allows to improve its efficiency and its flexibility thanks to their programmability.  ...  To exploit these devices, the designer has to identify the functionalities that have to be executed on them and provide their implementation by means of Hardware Description Languages. Generating  ...  Indeed the single parts of the systems can be described by the designer in the preferred language: TASTE currently supports Matlab/Simulink, SDL, C, Ada, and VHDL as input description languages.  ... 
doi:10.1109/aero.2016.7500675 fatcat:q4flq4y3trhgtnqpeflhimxa2i
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