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A System of Patterns for Fault Tolerance
2002
European Conference on Pattern Languages of Programs
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Many fault tolerance techniques that have been devised, applied and improved over the past three decades represent general solutions to recurring problems in the design of fault tolerant computer systems ...
In turn, these refinement relations create design frameworks for the development of fault tolerant systems with different efficiency and complexity characteristics. ...
These subsystems may not be fault tolerant themselves, and the fault tolerance mechanism that will be put in place will not provide any guarantees about them experiencing failures. ...
dblp:conf/europlop/Saridakis02
fatcat:pcgst3zf6rhk7iydrqm4uamnbi
DPCS
2015
ACM Transactions on Architecture and Code Optimization (TACO)
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Fault-Tolerant Voltage-Scalable (FTVS) SRAM cache architectures are a promising approach to improve energy efficiency of memories in the presence of nanoscale process variation. ...
Complex FTVS schemes are commonly proposed to achieve very low minimum supply voltages, but these can suffer from high overheads and thus do not always offer the best power/capacity trade-offs. ...
Fault Tolerance In the fault tolerance area, works targeting cache yield and/or min-VDD improvement include Error Correction Codes (ECCs) and architectural methods [Shirvani and McCluskey 1999; Agarwal ...
doi:10.1145/2792982
fatcat:wswxryw3nzehtahpdd5vlmuj2e
Hints and Principles for Computer System Design
[article]
2021
arXiv
pre-print
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It also gives some principles for system design that are more than just hints, and many examples of how to apply the ideas. ...
This new long version of my 1983 paper suggests the goals you might have for your system -- Simple, Timely, Efficient, Adaptable, Dependable, Yummy (STEADY) -- and techniques for achieving them -- Approximate ...
Any big or highly fault-tolerant centralized system will have a small market; witness supercomputers, and fault-tolerant systems since the decline of Tandem and Stratus. ...
arXiv:2011.02455v3
fatcat:jolyz5lknjdbpjpxjcrx5rh6fa
Leakage Assessment in Fault Attacks: A Deep Learning Perspective
[article]
2020
IACR Cryptology ePrint Archive
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Our DL-based detection test is not specific to only moment-based leakages and thus can expose leakages in several cases where t-test based technique demands a prohibitively large number of ciphertexts. ...
Finally, we present techniques for efficiently covering the fault space of a block cipher by exploiting logic-level and cipher-level fault equivalences. ...
The error-correction is performed with majority voting and is implemented with redundancy to make it fault-tolerant. ...
dblp:journals/iacr/SahaABMD20
fatcat:hk722cqb4rgo7hpldqfo74nq6a
A roadmap for traffic engineering in SDN-OpenFlow networks
2014
Computer Networks
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This paper surveys the state-of-the-art in traffic engineering for SDNs, and mainly focuses on four thrusts including flow management, fault tolerance, topology update, and traffic analysis/characterization ...
From Section 4 to Section 7, the major SDN traffic engineering technologies, including flow management, fault tolerance, topology update, and traffic analysis, are presented, respectively. ...
Acknowledgment The authors would like to thank Caterina Scoglio, Mehmet Can Vuran, Eylem Ekici, and Xudong Wang, for their valuable comments and suggestions to improve the quality of the paper. ...
doi:10.1016/j.comnet.2014.06.002
fatcat:krslqjw5prbbhnsvplmnez3omi
The challenge of irrationality
2009
Proceedings of the 11th Annual conference on Genetic and evolutionary computation - GECCO '09
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Computational development traditionally focuses on the use of an iterative, generative mapping process from genotype to phenotype in order to obtain complex phenotypes which comprise regularity, repetition and ...
The paper summarizes the fractal protein algorithm, provides a new analysis of how fractals are exploited by the developmental process, then presents experiments, results and analysis showing that evolution ...
For example, because the genotype now corresponds to a generative program, our solutions become capable of fault-tolerance, self-repair and may develop into complex solutions that can become greater in ...
doi:10.1145/1569901.1570000
dblp:conf/gecco/KrohnBS09
fatcat:mtyorouclvbvrn6pnww6yvimtq
Variability Mitigation in Nanometer CMOS Integrated Systems: A Survey of Techniques From Circuits to Software
2016
Proceedings of the IEEE
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We consider methods to predict and prevent, detect and correct, and finally conditions under which such errors can be accepted; we also consider their implications on cost, performance and quality. ...
We find that parallel architectures and parallelism in general provide the best means to combat and exploit variability to design resilient and efficient systems. ...
Therefore, a simple and low-overhead fault tolerance cache is proposed that supports few V DD levels for the data array SRAM cells. ...
doi:10.1109/jproc.2016.2518864
fatcat:sxrsu3excbdg5p7sk4iczz262y
Fast and Accurate Error Simulation for CNNs against Soft Errors
[article]
2022
arXiv
pre-print
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The great quest for adopting AI-based computation for safety-/mission-critical applications motivates the interest towards methods for assessing the robustness of the application w.r.t. not only its training ...
These error models are defined based on the corruption patterns of the output of the CNN operators induced by faults and bridge the gap between fault injection and error simulation, exploiting the advantages ...
A similar approach is proposed in [9] where an Algorithm-Based Fault Tolerance technique is used to reduce the hardening costs. ...
arXiv:2206.02051v1
fatcat:2iiyrlm7qncbro3u2n7t4j74ly
The Security of NTP's Datagram Protocol
[chapter]
2017
Lecture Notes in Computer Science
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The NTP specifications do not sufficiently respect (1) the conflicting security requirements of different NTP modes, and (2) the mechanism NTP uses to prevent off-path attacks. ...
We further leverage NTP's leaky control queries to convert this DoS attack to an off-path timeshifting attack. ...
We thank the Network Time Foundation and the maintainers of chrony and NTPsec for patching vulnerabilities described here. ...
doi:10.1007/978-3-319-70972-7_23
fatcat:yi2mzvq5rng2dkdllhz3gxswbi
SpiNNaker - programming model
2014
IEEE transactions on computers
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SpiNNaker is a multi-core computing engine, with a bespoke and specialised communication infrastructure that supports almost perfect scalability up to a hard limit of 2 16 Â 18 ¼ 1;179;648 cores. ...
This remarkable property is achieved at the cost of ignoring memory coherency, global synchronisation and even deterministic message passing, yet it is still possible to perform meaningful computations ...
ACKNOWLEDGMENTS This work was supported by the United Kingdom Engineering and Physical Sciences Research Council (under EPSRC grants EP/G015740/1 and EP/G015775/1), with industry partner ARM Ltd. ...
doi:10.1109/tc.2014.2329686
fatcat:gas4bqmryzblnjymj3dubab7hy
Decreasing-Rate Pruning Optimizes the Construction of Efficient and Robust Distributed Networks
2015
PLoS Computational Biology
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structure of networks, has not been studied. ...
parameter not previously studied by experimentalists, plays a critical role in optimizing network structure. ...
Author Contributions Conceived and designed the experiments: SN ALB ZBJ. Performed the experiments: SN ALB. Analyzed the data: SN. Contributed reagents/materials/analysis tools: SN ALB ZBJ. ...
doi:10.1371/journal.pcbi.1004347
pmid:26217933
pmcid:PMC4517947
fatcat:j27l7dd3hvd7npp5hesh5vdcvy
The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines, Second edition
2013
Synthesis Lectures on Computer Architecture
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We plan to revise the book relatively often and will make sure to acknowledge explicitly any input that can help us improve its usefulness and accuracy. ...
the hard work, insights, and creativity of our colleagues at Google. ...
, and fault tolerance within their respective domains. ...
doi:10.2200/s00516ed2v01y201306cac024
fatcat:435o455inbcmrakl6l7jp4gope
Scalable communications for a million-core neural processing architecture
2012
Journal of Parallel and Distributed Computing
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The communication networks and overlying protocols are key to the successful operation of the SpiNNaker architecture, designed together to maximise performance and minimise the power demands of the platform ...
The design of a new high-performance computing platform to model biological neural networks requires scalable, layered communications in both hardware and software. ...
In order to remain fault-tolerant, this assignment is made dynamically after power-on testing from the set of known-good processors. ...
doi:10.1016/j.jpdc.2012.01.016
fatcat:szz343lkvvb4rcpvfek4oof2fa
Network modelling and simulation tools
2009
Simulation modelling practice and theory
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To make this task easy, different users, researchers and companies have developed different network modelling and simulation (MS) tools. ...
Computer network technologies have been growing explosively and the study in computer networks is being a challenging task. ...
Limitation:1) The GUI however is very primitive and is inadequate for instructional purposes. It is not fault-tolerant to novice users. ...
doi:10.1016/j.simpat.2009.02.005
fatcat:micyepqhpjck3dcylb74juwbqu
The Real-Time Message Passing Interface Standard (MPI/RT-1.1)
2004
Concurrency and Computation
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Furthermore, MPI/RT-1.1 does not explicitly address mode changes (with guaranteed modechange QoS) between sets of channels, with invariants and non-invariants among the resources consumed. ...
MPI/RT-1.1, the standard version described here, does not cover all possible real-time parallel programming possibilities. ...
Jóse Muñoz of the DARPA Information Technologies Office The reason for this is that an implementation does not know the execution time for the handler and cannot determine whether the requested deadline ...
doi:10.1002/cpe.744
fatcat:6kfkgepolfgcpaudhqfieze7qi
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