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Data Lineage Model for Taverna Workflows with Lightweight Annotation Requirements [chapter]

Paolo Missier, Khalid Belhajjame, Jun Zhao, Marco Roos, Carole Goble
2008 Lecture Notes in Computer Science  
The provenance, or lineage, of a workflow data product can be reconstructed by keeping a complete trace of workflow execution.  ...  This lineage information, however, is likely to be both imprecise, because of the black-box nature of the services that compose the workflow, and noisy, because of the many trivial data transformations  ...  This would entail showing that Taverna workflows can be expressed using the NRC-based dataflow model, so that the provenance inference rules defined therein can be applied.  ... 
doi:10.1007/978-3-540-89965-5_4 fatcat:rftza5d3qfasvpqokcck65mpim

Partial results for online query processing

Vijayshankar Raman, Joseph M. Hellerstein
2002 Proceedings of the 2002 ACM SIGMOD international conference on Management of data - SIGMOD '02  
The crux of this architecture is a dataflow operator that supports two kinds of reorderings: reordering of intermediate tuples within a dataflow, and reordering of query plan operators through which tuples  ...  Traditional query processors generate full, accurate query results, either in batch or in pipelined fashion.  ...  In fact, different kinds of dataflows may be optimal for different kinds of tuples, even when user interests and data source properties remain constant.  ... 
doi:10.1145/564691.564723 dblp:conf/sigmod/RamanH02 fatcat:gkcfkefdbjaxte3dsbjp7qurlu

Partial results for online query processing

Vijayshankar Raman, Joseph M. Hellerstein
2002 Proceedings of the 2002 ACM SIGMOD international conference on Management of data - SIGMOD '02  
The crux of this architecture is a dataflow operator that supports two kinds of reorderings: reordering of intermediate tuples within a dataflow, and reordering of query plan operators through which tuples  ...  Traditional query processors generate full, accurate query results, either in batch or in pipelined fashion.  ...  In fact, different kinds of dataflows may be optimal for different kinds of tuples, even when user interests and data source properties remain constant.  ... 
doi:10.1145/564720.564723 fatcat:ve6e4luzzvfn5igmfbux2okak4

FPGA-Based Processor Acceleration for Image Processing Applications

Fahad Siddiqui, Sam Amiri, Umar Minhas, Tiantai Deng, Roger Woods, Karen Rafferty, Daniel Crookes
2019 Journal of Imaging  
The paper describes an approach based on an FPGA-based soft processor called Image Processing Processor (IPPro) which can operate up to 337 MHz on a high-end Xilinx FPGA family and gives details of the  ...  A number of parallel dataflow mapping options were explored giving a speed-up of 8 times for the k-means clustering using 16 IPPro cores, and a speed-up of 9.6 times for the morphology filter operation  ...  Conflicts of Interest: The authors declare no conflict of interest.  ... 
doi:10.3390/jimaging5010016 pmid:34465705 fatcat:rjevyyjetjfllofqb3b4qnqmse

Exploration of Systolic-Vector Architecture with Resource Scheduling for Dynamic ML Workloads [article]

Jung-Hoon Kim, Sungyeob Yoo, Seungjae Moon, Joo-Young Kim
2022 arXiv   pre-print
As artificial intelligence (AI) and machine learning (ML) technologies disrupt a wide range of industries, cloud datacenters face ever-increasing demand in inference workloads.  ...  a programmable scheduler, throughput-oriented systolic arrays, and function-oriented vector processors.  ...  However, it requires user-defined threshold values that are critical to scheduling performance [33] .  ... 
arXiv:2206.03060v1 fatcat:ndwgpb7nd5adzbimzz7oqkavza

SOFA: An Extensible Logical Optimizer for UDF-heavy Dataflows [article]

Astrid Rheinländer, Arvid Heise, Fabian Hueske, Ulf Leser, Felix Naumann
2013 arXiv   pre-print
In many novel application areas the predominant building blocks of such dataflows are user-defined predicates or functions (UDFs).  ...  A salient feature of our approach is extensibility: We arrange user-defined operators and their properties into a subsumption hierarchy, which considerably eases integration and optimization of new operators  ...  The optimization of relational queries with user-defined predicates has been another focus of research [5, 15, 26] .  ... 
arXiv:1311.6335v1 fatcat:3sojpzy65vbgnetjygme655hwa

Three steps is all you need: fast, accurate, automatic scaling decisions for distributed streaming dataflows

Vasiliki Kalavri, John Liagouris, Moritz Hoffmann, Desislava C. Dimitrova, Matthew Forshaw, Timothy Roscoe
2018 USENIX Symposium on Operating Systems Design and Implementation  
Some modern large-scale stream processors allow dynamic scaling but typically leave the difficult task of deciding how much to scale to the user.  ...  rates of individual dataflow operators.  ...  Other than this, the operator's internal logic can be any user-defined function.  ... 
dblp:conf/osdi/KalavriLHDFR18 fatcat:5ddhkycprjcyzmfzdv5otzunki

CODIPHY

Aveek Dutta, Dola Saha, Dirk Grunwald, Douglas Sicker
2013 Proceedings of the second workshop on Software radio implementation forum - SRIF '13  
Both solutions use an ontology based description of the internal structure of the radio subsystems and use the high-level dataflow represented by the ontology to target heterogeneous platforms.  ...  cognitive radio networks: Collaboration between two radio physical layers (PHY) with varying capabilities to agree on a common communication protocol and provide a method to compose a functioning software defined  ...  We discuss some of those in this section. Case 1: Hierarchical inference -CODIPHY assists in design and implementation of radio PHY for users with varied expertise.  ... 
doi:10.1145/2491246.2491247 dblp:conf/sigcomm/DuttaSGS13 fatcat:izgfkchnirhwdagqp2glcun4su

ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning [article]

Davide Giri, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca P. Carloni
2020 arXiv   pre-print
For the SoC integration of accelerators generated by HLS4ML, we designed a set of new parameterized interface circuits synthesizable with high-level synthesis.  ...  With this HW/SW layer, we addressed the challenge of dynamically shaping the data traffic on a network-on-chip to activate and support the reconfigurable pipelines of accelerators that are needed by the  ...  We thank the developer team of hls4ml. We acknowledge the Fast Machine Learning collective as an open community of multi-domain experts and collaborators.  ... 
arXiv:2004.03640v1 fatcat:2iulghzutvaa3hcmmgroxsprnu

A Dataflow IR for Memory Efficient RIPL Compilation to FPGAs [chapter]

Robert Stewart, Greg Michaelson, Deepayan Bhowmik, Paulo Garcia, Andy Wallace
2016 Lecture Notes in Computer Science  
In this paper we describe how the dataflow intermediary of our declarative FPGA image processing DSL called RIPL 3 enables us to constrain memory.  ...  Field programmable gate arrays (FPGAs) are fundamentally different to fixed processors architectures because their memory hierarchies can be tailored to the needs of an algorithm.  ...  two user defined functions.  ... 
doi:10.1007/978-3-319-49956-7_14 fatcat:6ajh4dbi65dxfb3i7chrkfgp5y

Pico: A Domain-Specific Language For Data Analytics Pipelines

Claudia Misale, Marco Aldinucci, Guy Tremblay
2017 Zenodo  
From the user-level perspective, we think that a clearer and simple semantics is preferable, together with a strong separation of concerns.  ...  By putting clear separations between all levels of abstraction (i.e., from the runtime to the user API), it is easier for a programmer or software designer to avoid mixing low level with high level aspects  ...  Acknowledgements Funding This work has been partially supported by the Italian Ministry of Education and Research (MIUR), by the EU-H2020 RIA project "Toreador" (no. 688797), the EU-H2020 RIA project  ... 
doi:10.5281/zenodo.579753 fatcat:aadje57qh5hk3ijmqn4j7vkhpm

Dandelion

Christopher J. Rossbach, Yuan Yu, Jon Currey, Jean-Philippe Martin, Dennis Fetterly
2013 Proceedings of the Twenty-Fourth ACM Symposium on Operating Systems Principles - SOSP '13  
It therefore provides an expressive data model and native language integration for user-defined functions, enabling programmers to write applications using standard highlevel languages and development  ...  This paper discusses the design and implementation of Dandelion, focusing on the distributed CPU and GPU implementation. We evaluate the system using a diverse set of workloads.  ...  OneStep invokes the user-defined function NearestCenter to compute the nearest center of a vector.  ... 
doi:10.1145/2517349.2522715 dblp:conf/sosp/RossbachYCMF13 fatcat:3gexgzl4ebc65c3f7hx4dgh42a

Static analysis of Taverna workflows to predict provenance patterns

Pinar Alper, Khalid Belhajjame, Carole A. Goble
2017 Future generations computer systems  
Our rules exploit the well-defined execution behaviour in the Taverna system. In order to understand Factorial Design support in workflow systems in general, we provide a comparative survey.  ...  , which we name as the level of support for Factorial Design, and 2) the practice of scientists in successfully encoding Factorial Design into workflows.  ...  At the workflow specification backend Taverna automatically infers the dataflow adjustments required for a successful execution of the workflow.  ... 
doi:10.1016/j.future.2017.01.004 fatcat:2fnp3id5jnekhpk7owswpjmdiu

GraphX: Graph Processing in a Distributed Dataflow Framework

Joseph E. Gonzalez, Reynold S. Xin, Ankur Dave, Daniel Crankshaw, Michael J. Franklin, Ion Stoica
2014 USENIX Symposium on Operating Systems Design and Implementation  
to the Proceedings of the 11th USENIX Symposium on Operating Systems Design and Implementation is sponsored by USENIX.  ...  The properties can include meta-data (e.g., user profiles and time stamps) and program state (e.g., the PageRank of vertices or inferred affinities).  ...  The Property Graph Data Model Graph processing systems represent graph structured data as a property graph [33] , which associates user-defined properties with each vertex and edge.  ... 
dblp:conf/osdi/GonzalezXDCFS14 fatcat:figkr5l2h5gurga5pkvku4ywna

Area-Energy Aware Dataflow Optimisation of Visual Tracking Systems [chapter]

Paulo Garcia, Deepayan Bhowmik, Andrew Wallace, Robert Stewart, Greg Michaelson
2018 Lecture Notes in Computer Science  
Dataflow model allows processing datapaths comprised of several independent and well defined computations.  ...  Vision systems are increasingly being deployed in power constrained scenarios, where the dataflow model of computation has become popular for describing complex algorithms.  ...  Acknowledgement: We acknowledge the support of the Engineering and Physical Research Council, grant references EP/K009931/1 (Programmable embedded platforms for remote and compute intensive image processing  ... 
doi:10.1007/978-3-319-78890-6_42 fatcat:ydqqk5wvgrcd5lf4jvu4ot5hoa
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