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Incremental Benchmarks for Software Verification Tools and Techniques [chapter]

Bruce W. Weide, Murali Sitaraman, Heather K. Harton, Bruce Adcock, Paolo Bucci, Derek Bronish, Wayne D. Heym, Jason Kirschenbaum, David Frazier
Lecture Notes in Computer Science  
These benchmarks support assessment of verification tools and techniques to prove total correctness of functionality of sequential object-based and object-oriented software.  ...  This paper proposes an initial catalog of easy-to-state, relatively simple, and incrementally more and more challenging benchmark problems for the Verified Software Initiative.  ...  Friedman (whose decision procedure for strings with some restrictions is used in SplitDecision), Greg Kulczycki, Bill Ogden, and Anna Wolf.  ... 
doi:10.1007/978-3-540-87873-5_10 fatcat:t4rjp5iqf5apfmnyovckokgcz4

Successful Use of Incremental BMC in the Automotive Industry [chapter]

Peter Schrammel, Daniel Kroening, Martin Brain, Ruben Martins, Tino Teige, Tom Bienmüller
2015 Lecture Notes in Computer Science  
This paper reports on the extension of the software model checker CBMC to support incremental BMC and its successful integration with the industrial embedded software verification tool BTC EMBEDDEDTESTER  ...  Existing industrial tools for embedded software use an off-the-shelf Bounded Model Checker and apply it iteratively to verify the program with an increasing number of unwindings.  ...  Conclusions We claim that incremental BMC is an indispensable technique for industrial embedded software verification based on BMC.  ... 
doi:10.1007/978-3-319-19458-5_5 fatcat:x3f5szch6bchzgekzpj2vjttbi

Incremental Bounded Model Checking for Embedded Software (extended version) [article]

Peter Schrammel, Daniel Kroening, Martin Brain, Ruben Martins, Tino Teige, Tom Bienmüller
2014 arXiv   pre-print
This paper reports on the extension of the software model checker CBMC to support incremental Bounded Model Checking and its successful integration with the industrial embedded software verification tool  ...  Existing industrial tools for embedded software use an off-the-shelf Bounded Model Checker and apply it iteratively to verify the program with an increasing number of unwindings.  ...  Conclusions We claim that incremental BMC is an indispensable technique for embedded software verification that should be considered state-of-the-art in such tools.  ... 
arXiv:1409.5872v1 fatcat:ibo5lzwpivexffncnop77ziidu

Incremental bounded model checking for embedded software

Peter Schrammel, Daniel Kroening, Martin Brain, Ruben Martins, Tino Teige, Tom Bienmüller
2017 Formal Aspects of Computing  
This article reports on the extension of the software model checker CBMC to support incremental BMC and its successful integration with the industrial embedded software verification tool BTC EMBEDDEDTESTER  ...  Existing industrial tools for embedded software use an off-the-shelf bounded model checker and apply it iteratively to verify the program with an increasing number of unwindings.  ...  verification tool for embedded software uses.  ... 
doi:10.1007/s00165-017-0419-1 fatcat:mkzrl3km7bdapo54lrhlpvh2ye

Interpolation-based model checking for efficient incremental analysis of software

G. Fedyukovich, A. E. J. Hyvarinen, N. Sharygina
2013 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)  
These techniques have been implemented in tools FunFrog and eVolCheck for verifying C programs.  ...  Both of them have been tested on a range of academic and industrial benchmarks, and provide in many cases an order of magnitude speed-up with respect to the baseline.  ...  In this extended abstract we discuss a technique for extracting reusable information about software to avoid repeating previous computation in an incremental verification task.  ... 
doi:10.1109/ddecs.2013.6549778 dblp:conf/ddecs/FedyukovichHS13 fatcat:3wk7socmvfehlconcvc277tgpi

Hardware Verification Using Software Analyzers

Rajdeep Mukherjee, Daniel Kroening, Tom Melham
2015 2015 IEEE Computer Society Annual Symposium on VLSI  
We investigate the use of modern software verification tools for formal property checking of hardware given in Verilog at register-transfer level.  ...  for property verification of hardware designs at netlist and registertransfer level.  ...  The tool uses MiniSat 2.2.0 to perform incremental SAT solving for the generated path constraints.  ... 
doi:10.1109/isvlsi.2015.107 dblp:conf/isvlsi/MukherjeeKM15 fatcat:oc6sg3b6afeqfb53cddzyqik4e

InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization

Kai-hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco
2007 8th International Symposium on Quality Electronic Design (ISQED'07)  
To address these challenges, we propose a fast incremental verification system for physical synthesis optimizations, InVerS, which includes capabilities for error detection, diagnosis, and visualization  ...  In addition, the lack of interoperability between verification and debugging tools greatly limits engineers' productivity.  ...  As we will show later, InVerS addresses these problems by providing a fast incremental verification technique and an integrated error visualization tool.  ... 
doi:10.1109/isqed.2007.94 dblp:conf/isqed/ChangPMB07 fatcat:cfdukune2bfybididfgjmztpci

Making Software Verification Tools Really Work [chapter]

Jade Alglave, Alastair F. Donaldson, Daniel Kroening, Michael Tautschnig
2011 Lecture Notes in Computer Science  
We discuss problems and barriers which stand in the way of producing verification tools that are robust, scalable and integrated in the software development cycle.  ...  Logistical obstacles we identify are the lack of standard benchmarks to drive tool quality and efficiency, and the difficulty for academic research institutions of allocating resources to tool development  ...  Acknowledgments We thank Vijay D'Silva for stimulating discussion during the writing of this paper, and for useful pointers to related work.  ... 
doi:10.1007/978-3-642-24372-1_3 fatcat:me5zmhg5irgurazxa5jgjkxvgm

Introduction to the Special Issue devoted to SPIN 2018

María del Mar Gallardo, Pedro Merino
2020 International Journal on Software Tools for Technology Transfer (STTT)  
Publisher's Note Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.  ...  or with interesting results; engineering and implementation of software verification and analysis tools; benchmark and comparative studies for formal verification and analysis tools; formal methods education  ...  ; static analysis and abstract interpretation; combination of verification techniques; modular and compositional verification techniques; verification of timed and probabilistic systems; automated testing  ... 
doi:10.1007/s10009-020-00550-7 fatcat:4woveliu5jg4pflwivxr7r4fwm

Incremental Symbolic Bounded Model Checking of Software Using Interval Methods via Contractors [article]

Mohannad Aldughaim, Kaled Alshmrany, Rafael Menezes, Lucas Cordeiro, Alexandru Stancu
2022 arXiv   pre-print
Experimental results demonstrate the efficiency and efficacy of our proposed approach over a large set of benchmarks, including 7044 verification tasks, compared with state-of-the-art BMC tools.  ...  However, BMC techniques struggle to falsify programs that contain loops.  ...  Related Work One of the most known software verification frameworks for static analysis and verification for C/C++, and Java is CBMC [30] , [36] .  ... 
arXiv:2012.11245v3 fatcat:i2it5zc32jactdvqmodylfo3b4

13th International Workshop on Graph Transformation and Visual Modeling Techniques (GTVMT 2014): Preface

Frank Hermann, Stefan Sauer
2014 Electronic Communications of the EASST  
tools for the specification, modelling, validation, manipulation and verification of complex systems.  ...  Preface GT-VMT 2014 was the thirteenth workshop of a series that serves as a forum for all researchers and practitioners interested in the use of visual, especially graph-based notations, techniques and  ...  Another topic of interest was the provision of benchmarks ('exmple zoos' or just a 'pet farm') for tool contests and comparison with existing solutions based on reusable examples.  ... 
doi:10.14279/tuj.eceasst.67.949.923 dblp:journals/eceasst/0001S14 fatcat:vfelf5znezdidicv3lspw6d6wi

ESBMC-Jimple: Verifying Kotlin Programs via Jimple Intermediate Representation [article]

Rafael Menezes, Daniel Moura, Helena Cavalcante, Rosiane Freitas, Lucas Cordeiro
2022 arXiv   pre-print
In this work, we describe and evaluate the first model checker for verifying Kotlin programs through the Jimple intermediate representation.  ...  Experimental results show that ESBMC-Jimple can correctly verify a set of Kotlin benchmarks from the literature and that it is competitive with state-of-the-art Java bytecode verifiers.  ...  ACKNOWLEDGMENTS This research was partially sponsored by Motorola Mobility Comércio de Produtos Eletrônicos Ltda and Flextronics da Amazônia Ltda, according to Federal Law nº 8.387/1991, through agreement  ... 
arXiv:2206.04397v1 fatcat:4wxbp4aqgffvhkmjfwa6wsv2ru

Incremental Verification with Error Detection, Diagnosis, and Visualization

Kai-hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco
2009 IEEE Design & Test of Computers  
investing in the performance of verification algorithms and tools but also revising the design methodology to ease the burden on verification and debug.  ...  Our technique also suggests the most probable location and source of the error, typically pinpointing the specific transformation responsible for it.  ...  Invers addresses these problems by providing a fast incremental-verification technique and an integrated error visualization tool.  ... 
doi:10.1109/mdt.2009.38 fatcat:yt7aitq57jbyxbplynypxhurye

Model Checking Embedded C Software Using k-Induction and Invariants [chapter]

Herbert Rocha, Hussama Ismail, Lucas Cordeiro, Raimundo Barreto
2017 Embedded Software Verification and Debugging  
We present a proof by induction algorithm, which combines k-induction with invariants to model check embedded C software with bounded and unbounded loops.  ...  that the safety property φ holds in all states reachable within k unwindings; and in the inductive step, we check that whenever φ holds for k unwindings, it also holds after the next unwinding of the  ...  In Table I , the verification time of DepthK to the loops benchmarks is usually faster than the other tools, except for ESBMC, as shown in Fig. 2 .  ... 
doi:10.1007/978-1-4614-2266-2_7 fatcat:ok7q6zfsana6rj643pixnjzt2u

Boosting k-Induction with Continuously-Refined Invariants [chapter]

Dirk Beyer, Matthias Dangl, Philipp Wendler
2015 Lecture Notes in Computer Science  
k-induction is a promising technique to extend bounded model checking from falsification to verification.  ...  In software verification, k-induction works only if auxiliary invariants are used to strengthen the induction hypothesis.  ...  for software verification.  ... 
doi:10.1007/978-3-319-21690-4_42 fatcat:liqw4p3syfc3dccbylyjepxxne
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