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The design of a flexible Global Calorimeter Trigger system for the Compact Muon Solenoid experiment

J J Brooke, D G Cussans, R J E Frazier, S B Galagedera, G P Heath, B J Huckvale, S J Nash, D M Newbold, A A Shah
2007 Journal of Instrumentation  
We have developed a novel design of triggering system as part of the pipelined hardware Level-1 trigger logic for the CMS experiment at LHC.  ...  We describe the hardware, firmware and software components of this solution.  ...  Acknowledgements The authors would like to thank the following for useful discussions on the project: Steve Quinton, Rob Halsall and John Maddox of Engineering and Instrumentation Division at Rutherford  ... 
doi:10.1088/1748-0221/2/10/p10002 fatcat:tpnpggfevvaxpjezuog66kmu3i

Network Organization and Governance [chapter]

2018 CRC Handbook of Modern Telecommunications  
The PAD field consists of an arbitrary array of bits.  ...  However, successful implementation of an ERP system has been one of the major critical issues in utilizing ERP systems.  ...  Many critical telecommunications functions rely on fast complex analysis of CDR data.  ... 
doi:10.1201/9781420078084-9 fatcat:eyixyd27nzbmthwoqybadgqz2e

Space and High Energy Experiments Advanced Electronic Systems 2012

Ryszard S. Romaniuk
2012 International Journal of Electronics and Telecommunications  
The symposium is an annual summary in the development of numerable Ph.D. theses carried out in this country in the area of advanced electronic and photonic systems.  ...  A digest of Wilga references is presented [1]-[60]. This paper is the first part of the digest focused on astronomy, space, astroparticle physics, accelerators, and high energy physics experiments.  ...  Automatic recording of parameters of all components of the Pi of the Sky experiment allows an efficient identification of possible causes of failures.  ... 
doi:10.2478/v10177-012-0060-0 fatcat:2nrsjwpharcuva4642wi3zmbim

2019 Index IEEE Transactions on Instrumentation and Measurement Vol. 68

2019 IEEE Transactions on Instrumentation and Measurement  
., +, TIM Nov. 2019 4412-4418 Field programmable gate arrays A 2.3-ps RMS Resolution Time-to-Digital Converter Implemented in a Low- Cost Cyclone V FPGA.  ...  ., +, TIM Feb. 2019 462-473 Fast Fourier-Based Implementation of Synthetic Aperture Radar Algorithm for Multistatic Imaging System.  ...  Image scanners Nonlinear Reconstruction of Multilayer Media in Scanning Microwave Microscopy. Wei, Z., +, TIM Jan. 2019 197-205  ... 
doi:10.1109/tim.2019.2956662 fatcat:kotlu7gwcngrdkelerc5va2hqe

Power pulsing of the CALICE tile hadron calorimeter

Mathias Reinecke
2016 2016 IEEE Nuclear Science Symposium, Medical Imaging Conference and Room-Temperature Semiconductor Detector Workshop (NSS/MIC/RTSD)  
This achievement was recognised through the award of the 2015 Nobel prize for physics to the leaders of the SNO and Super-Kamiokande experiments for the conclusive establishment of the phenomenon of neutrino  ...  In this talk I will describe the scientific aims of DUNE, focussing on the experimental challenges in constructing an operating very large liquid argon time projection chamber detectors.  ...  This article is based upon work from COST Action (TD1401, FAST), supported by COST (European Cooperation in Science and Technology).  ... 
doi:10.1109/nssmic.2016.8069748 fatcat:zjgd7dmfdbhntb4kfwdtrlejhi

Design of large polyphase filters in the Quadratic Residue Number System

Gian Carlo Cardarilli, Alberto Nannarelli, Yann Oster, Massimo Petricca, Marco Re
2010 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers  
We also investigate a parallel implementation mapping of the algorithm on a Xilinx Virtex-5 field-programmable gate array (FPGA) platform.  ...  The paper presents the architectural domain analysis for FPGA (Field Programmable Gate Array) implementation of a polyphase filter bank channelizer with an embedded square root shaping filter in its polyphase  ... 
doi:10.1109/acssc.2010.5757589 fatcat:ccxnu5owr5fyrcjcqukumerueq

Satellite Communications in the New Space Era: A Survey and Future Challenges [article]

O. Kodheli, E. Lagunas, N. Maturo, S. K. Sharma, B. Shankar, J. F. Mendoza Montoya, J. C. Merlano Duncan, D. Spano, S. Chatzinotas, S. Kisseleff, J. Querol, L. Lei (+2 others)
2020 arXiv   pre-print
Firstly, the main innovation drivers are motivated, such as new constellation types, on-board processing capabilities, nonterrestrial networks and space-based data collection/processing.  ...  The present survey aims at capturing the state of the art in SatComs, while highlighting the most promising open research topics.  ...  The FPGA (Field-Programmable Gate Array) processing units, model NI FlexRIO 7976R, are inserted in the PXI chassis slots to increase to realtime processing capabilities, and consist of the Xilinx FPGA  ... 
arXiv:2002.08811v2 fatcat:u3uvhm5bovg6povxbwwl5h6rqq

Copyright Page [chapter]

2018 The RF and Microwave Handbook - 3 Volume Set  
Reasonable efforts have been made to publish reliable data and information, but the author and the publisher cannot assume responsibility for the validity of all materials or for the consequences of their  ...  , and recording, or in any information storage or retrieval system, without written permission from the publishers.  ...  The frequency-independent antenna is based on designs that are specified in terms of geometric angles.  ... 
doi:10.1201/9781315217703-18 fatcat:wmkr4uimdjexjg7wuanbgkolp4

Modeling, analysis and exploration of layers: A 3D computing architecture

Zoltan Endre Rakossy
2014 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC)  
Acknowledgements This thesis is the result of my work as research assistant at the Institute for Communication Technologies and Embedded Systems (ICE), Multiprocessor System-on-Chip Architectures (MPSoC  ...  ) group, at the RWTH Aachen University.  ...  Field-programmable Gate Array (FPGA)-based designs for SDR, like the WARP board, are extensively used for prototyping and research of new wireless standards and optimizations [71] [153] , but power  ... 
doi:10.1109/vlsi-soc.2014.7004167 dblp:conf/vlsi/Rakossy14 fatcat:6h3w3hfgdjeytitl7wnwrard34

An introduction to local area networks

D.D. Clark, K.T. Pogran, D.P. Reed
1978 Proceedings of the IEEE  
Secand, A t protocols should be w d f a the apemt~an of the wtwak?  ...  There .re two basic issues m loal area netwak desi@.  ...  In the LNI control of transmission and control of reception are each achieved with a sequential state machine composed of a state counter, field-programmable logic array (FPLA), header field length and  ... 
doi:10.1109/proc.1978.11152 fatcat:momgta2yq5chdd2svlqxhbma4i

1986-1999 combined index IEEE aerospace and electronic systems magazine vols. 1-14 [Subject Index]

2000 IEEE Transactions on Aerospace and Electronic Systems  
Adaptive filters Add-on boards IRS-I C Indian Remote Sensing Satellite, on-board computer, PC based test wind detect. in microcosm, shiplaircraft environ. sens.  ...  ., AES-MAug 96 8-10 IRS-I C Indian Remote Sensing Satellite, on-board computer, PC based test LabVIEW rapid prototyping environ. for avionics syst. teaching. mil. avionics with INS/GPS.  ...  P., + , AES-MSep 99 43-46 Instrument landin'g systems applications of slotted-cable antennas. Watts, C. B., Jr., AES-M May 90 16-20 case for continued implementation despite MLS implementation.  ... 
doi:10.1109/taes.2000.869530 fatcat:dqlflsnslveyri76fpijskbzqi

Implementation of Fog computing for reliable E-health applications

Razvan Craciunescu, Albena Mihovska, Mihail Mihaylov, Sofoklis Kyriazakos, Ramjee Prasad, Simona Halunga
2015 2015 49th Asilomar Conference on Signals, Systems and Computers  
In addition, we will improve on the performance of such Coded ALOHA protocols in terms of the resource efficiency.  ...  We will mathematically analyze the system accordingly and provide expressions for the capture probabilities of the underlying sparse multiuser detector.  ...  In this paper we describe initial work exploring the hardware compatibility of this new algorithm on field-programmable gate-arrays (FPGAs).  ... 
doi:10.1109/acssc.2015.7421170 dblp:conf/acssc/CraciunescuMMKP15 fatcat:qm6mki5z6bcvrfimkmqjyrxaxm

Satellite Communications in the New Space Era: A Survey and Future Challenges

Oltjon Kodheli, Eva Lagunas, Nicola Maturo, Shree Krishna Sharma, Bhavani Shankar, Jesus Fabian Mendoza Montoya, Juan Carlos Merlano Duncan, Danilo Spano, Symeon Chatzinotas, Steven Kisseleff, Jorge Querol, Lei Lei (+2 others)
2020 IEEE Communications Surveys and Tutorials  
The present survey aims at capturing the state of the art in SatComs, while highlighting the most promising open research topics.  ...  Firstly, the main innovation drivers are motivated, such as new constellation types, on-board processing capabilities, nonterrestrial networks and space-based data collection/processing.  ...  PHY & MAC: Software Defined Radio (SDR) Based An SDR platform consists of a hardware RF front-end, and a digital signal processing DSP unit implemented in signal processors, Field Programmable Gate Arrays  ... 
doi:10.1109/comst.2020.3028247 fatcat:qdsitas5xjhwtfhs6nin3eus5q

HBD HV Control and Monitoring System for the PHENIX Experiment at the Relativistic Heavy Ion Collider

Manuel Proissl
2009 Zenodo  
This work outlines the development of new High Voltage Control and Monitoring System (HVC) for the Hadron Blind Detector (HBD), with this the detector's performance is optimized through intelligent HV  ...  The actual heart of the entire system is the high performance and capacity Field-Programmable Gate Array (FPGA) XC4000E, which includes very flexible, programmable architecture of Configurable Logic Blocks  ...  -MF: Mainframe 1458; MC: Microcontroller; EEPROM: Electrically Erasable Programmable Read-Only Memory; FPGA: Field-Programmable Gate Array; SR: Shiftregister; BD: Octal Buffer/Line Driver; FET: Field-Effect  ... 
doi:10.5281/zenodo.4331444 fatcat:wqwghyk33jhmne5pwx46yrsani

Survey and future directions of fault-tolerant distributed computing on board spacecraft

Muhammad Fayyaz, Tanya Vladimirova
2016 Advances in Space Research  
of task states minimal, which proves the advantages of the adopted cooperative distributed approach for use on board spacecraft. iii  ...  Implementation approaches at two levels were adopted to provide a proof of concept: a board level and a Multiprocessor System-on-Chip (MPSoC) level.  ...  To achieve a reconfigurable computing platform, static random access memory (SRAM) based field programmable gate arrays (FPGAs) are used.  ... 
doi:10.1016/j.asr.2016.08.017 fatcat:szoac6aiwvbs3d2dyh5smxsgqa
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